| 2008 |
|---|
| 8 | EE | Takayuki Onishi,
Takashi Sano,
Koyo Nitta,
Mitsuo Ikeda,
Jiro Naganuma:
Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.
ISCAS 2008: 800-803 |
| 2007 |
|---|
| 7 | EE | Hiroe Iwasaki,
Jiro Naganuma,
Koyo Nitta,
Ken Nakamura,
Takeshi Yoshitome,
Mitsuo Ogura,
Yasuyuki Nakajima,
Yutaka Tashiro,
Takayuki Onishi,
Mitsuo Ikeda,
Toshihiro Minami,
Makoto Endo,
Yoshiyuki Yashima:
Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level.
IEEE Trans. VLSI Syst. 15(9): 1055-1059 (2007) |
| 2006 |
|---|
| 6 | EE | Takayuki Onishi,
Mitsuo Ikeda,
Jiro Naganuma,
Makoto Endo,
Yoshiyuki Yashima:
Highly accurate de-jittering scheme for broadcast quality video transmission.
Systems and Computers in Japan 37(10): 81-88 (2006) |
| 2004 |
|---|
| 5 | | Takayuki Onishi,
Mitsuo Ikeda,
Jiro Naganuma,
Makoto Endo,
Yoshiyuki Yashima:
A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level.
ISCAS (2) 2004: 261-264 |
| 2003 |
|---|
| 4 | EE | Hiroe Iwasaki,
Jiro Naganuma,
Koyo Nitta,
Ken Nakamura,
Takeshi Yoshitome,
Mitsuo Ogura,
Yasuyuki Nakajima,
Yutaka Tashiro,
Takayuki Onishi,
Mitsuo Ikeda,
Makoto Endo:
Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level.
DATE 2003: 20002-20007 |
| 2000 |
|---|
| 3 | EE | Ken Nakamura,
Mitsuo Ikeda,
Takeshi Yoshitome,
Takeshi Ogura:
Global Rate Control Scheme for MPEG-2 HDTV Parallel Encoding System.
ITCC 2000: 195-200 |
| 1999 |
|---|
| 2 | EE | Mitsuo Ikeda,
Toshio Kondo,
Koyo Nitta,
Kazuhito Suguri,
Takeshi Yoshitome,
Toshihiro Minami,
Jiro Naganuma,
Takeshi Ogura:
An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture.
DATE 1999: 44- |
| 1 | EE | Tsuneo Okubo,
Mitsuo Ikeda,
Yutaka Tashiro,
Toshio Kondo,
Ryota Kasai,
Hiroshi Kotera,
Tetsuma Sakurai:
Concurrent and collaborative methodologies in short TAT LSI design and manufacturing.
Systems and Computers in Japan 30(7): 79-91 (1999) |
