1999 |
36 | EE | Stefan Hendricx,
Luc J. M. Claesen:
Verification of Finite-State-Machine Refinements Using a Symbolic Methodology.
CHARME 1999: 326-329 |
35 | EE | Stefan Hendricx,
Luc J. M. Claesen:
Formally Verified Redundancy Removal.
DATE 1999: 150- |
34 | EE | Stefan Hendricx,
Luc J. M. Claesen:
Symbolic Multi-Level Verification of Refinement.
Great Lakes Symposium on VLSI 1999: 288-291 |
1998 |
33 | EE | Ronny Martens,
Luc J. M. Claesen:
Incorporating local consistency information into the online signature verification process.
IJDAR 1(2): 110-115 (1998) |
1997 |
32 | | Ronny Martens,
Luc J. M. Claesen:
An Evaluation of Different Handwriting Observation Techniques from a Signature Verification Point of View.
BSDIA 1997: 273-282 |
31 | EE | Stefan Hendricx,
Luc J. M. Claesen:
A symbolic core approach to the formal verification of integrated mixed-mode applications.
ED&TC 1997: 432-436 |
30 | EE | Ronny Martens,
Luc J. M. Claesen:
Dynamic Programming Optimisation for On-line Signature Verificatio.
ICDAR 1997: 653-656 |
29 | EE | Ronny Martens,
Luc J. M. Claesen:
On-line Signature Verification: Discrimination Emphasised.
ICDAR 1997: 657-660 |
1996 |
28 | EE | Olivier Thiry,
Luc J. M. Claesen:
A formal verification technique for embedded software.
ICCD 1996: 352-357 |
1995 |
27 | | Luc J. M. Claesen:
ED&TC 1995: Simulation versus formal verification.
IEEE Design & Test of Computers 12(2): 82- (1995) |
1994 |
26 | | Mark Genoe,
Luc J. M. Claesen,
Hugo De Man:
A Parallel Method for Functional Verification of Medium and High Throughput DSP Synthesis.
ICCD 1994: 460-463 |
25 | | Catia M. Angelo,
Luc J. M. Claesen,
Hugo De Man:
Reasoning About a Class of Linear Systems of Equations in HOL.
TPHOLs 1994: 33-48 |
24 | | Diederik Verkest,
Luc J. M. Claesen,
Hugo De Man:
A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU.
Formal Methods in System Design 4(1): 5-31 (1994) |
23 | | Catia M. Angelo,
Luc J. M. Claesen,
Hugo De Man:
Modeling Multi-rate DSP Specification Semantics for Formal Transformational Design in HOL.
Formal Methods in System Design 5(1/2): 61-94 (1994) |
1993 |
22 | | David Agnew,
Luc J. M. Claesen,
Raul Camposano:
Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL '93, sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993
North-Holland 1993 |
21 | | Luc J. M. Claesen,
Michael J. C. Gordon:
Higher Order Logic Theorem Proving and its Applications, Proceedings of the IFIP TC10/WG10.2 Workshop HOL'92, Leuven, Belgium, 21-24 September 1992
North-Holland/Elsevier 1993 |
20 | | Catia M. Angelo,
Luc J. M. Claesen,
Hugo De Man:
Degrees of Formality in Shallow Embedding Hardware Description Languages in HOL.
HUG 1993: 89-100 |
19 | | Luc J. M. Claesen,
Joan Daemen,
Mark Genoe,
G. Peeters:
Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip.
ICCD 1993: 610-613 |
18 | | Catia M. Angelo,
Diederik Verkest,
Luc J. M. Claesen,
Hugo De Man:
On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification.
Formal Methods in System Design 2(1): 45-72 (1993) |
1992 |
17 | | Diederik Verkest,
Luc J. M. Claesen,
Hugo De Man:
A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU.
Designing Correct Circuits 1992: 173-192 |
16 | | P. Johannes,
Luc J. M. Claesen,
Hugo De Man:
Performance Through Hierarchy in Static Timing Verification.
IFIP Congress (1) 1992: 703-709 |
15 | | Diederik Verkest,
J. Vandenbergh,
Luc J. M. Claesen,
Hugo De Man:
A Description Methodology for Parameterized Modules in the Boyer-Moore Logic.
TPCD 1992: 37-57 |
14 | | Catia M. Angelo,
Luc J. M. Claesen,
Hugo De Man:
The Formal Semantics Definition of a Multi-Rate DSP Specification Language in HOL.
TPHOLs 1992: 375-394 |
1991 |
13 | | Mark Genoe,
Luc J. M. Claesen,
Eric Verlind,
Frank Proesmans,
Hugo De Man:
Illustration of the SFG-Tracing Multi-Level Behavioral Verification Methodology, by the Correctness Proof of a High to Low Level Synthesis Application in CATHEDRAL-II.
ICCD 1991: 338-341 |
12 | | Catia M. Angelo,
Diederik Verkest,
Luc J. M. Claesen,
Hugo De Man:
Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis.
TPHOLs 1991: 340-347 |
11 | | W. Ploegaerts,
Luc J. M. Claesen,
Hugo De Man:
Defining Recursive Functions in HOL.
TPHOLs 1991: 358-366 |
1990 |
10 | EE | Patrick Odent,
Luc J. M. Claesen,
Hugo De Man:
A combined waveform relaxation: waveform relaxation newton algorithm for efficient parallel circuit simulation.
EURO-DAC 1990: 244-248 |
9 | EE | J. P. Schupp,
Johan Cockx,
Luc J. M. Claesen,
Hugo De Man:
SPI: an open interface integrating highly interactive electronic CAD tools.
EURO-DAC 1990: 492-495 |
8 | EE | P. Johannes,
P. Das,
Luc J. M. Claesen,
Hugo De Man:
SLOCOP-II: a versatile timing verification system for MOSVLSI.
EURO-DAC 1990: 518-523 |
7 | EE | Diederik Verkest,
Luc J. M. Claesen,
Hugo De Man:
Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment.
EURO-DAC 1990: 62-66 |
6 | EE | Patrick Odent,
Luc J. M. Claesen,
Hugo De Man:
Acceleration of relaxation-based circuit simulation using a multiprocessor system.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(10): 1063-1072 (1990) |
5 | EE | Jacques Benkoski,
E. Vanden Meersch,
Luc J. M. Claesen,
Hugo De Man:
Timing verification using statically sensitizable paths.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(10): 10723-10784 (1990) |
1989 |
4 | EE | Patrick Odent,
Luc J. M. Claesen,
Hugo De Man:
Feedback Loops and Large Subcircuits in the Multiprocessor Implementation of a Relaxation Based Circuit Simulator.
DAC 1989: 25-30 |
3 | EE | Ivo Bolsens,
W. De Rammelaere,
Luc J. M. Claesen,
Hugo De Man:
Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour.
DAC 1989: 513-518 |
2 | EE | S. Perremans,
Luc J. M. Claesen,
Hugo De Man:
Static Timing Analysis of Dynamically Sensitizable Paths.
DAC 1989: 568-573 |
1986 |
1 | EE | Paul Six,
Luc J. M. Claesen,
Jan M. Rabaey,
Hugo De Man:
An intelligent module generator environment.
DAC 1986: 730-735 |