| 2009 |
|---|
| 20 | EE | Héctor Navarro,
Saeid Nooshabadi,
Juan A. Montiel-Nelson,
Victor Navarro-Botello,
J. Sosa,
José C. García:
A geometric approach to register transfer level satisfiability.
ISQED 2009: 272-275 |
| 2007 |
|---|
| 19 | EE | José C. García,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects.
ISCAS 2007: 881-884 |
| 18 | EE | Victor Navarro-Botello,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
High performance low power CMOS dynamic logic for arithmetic circuits.
Microelectronics Journal 38(4-5): 482-488 (2007) |
| 2006 |
|---|
| 17 | EE | José C. García,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
Low Power Bootstrapped CMOS Differential Cross Coupled Driver.
APCCAS 2006: 704-707 |
| 16 | EE | José C. García,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
Bootstrapped full--swing CMOS driver for low supply voltage operation.
DATE 2006: 410-411 |
| 15 | EE | R. Morales-Ramos,
Juan A. Montiel-Nelson,
R. Berenguer,
A. Garcia-Alonso:
Voltage Sensors for Supply Capacitor in Passive UHF RFID Transponders.
DSD 2006: 625-629 |
| 14 | EE | R. Morales-Ramos,
Juan A. Montiel-Nelson,
H. Milosiu,
R. Berenguer,
A. Garcia-Alonso:
Adjustable Voltage Sensors for Power Supply Chains in Passive UHF RFID Transponders.
ETFA 2006: 286-291 |
| 13 | EE | R. Morales-Ramos,
J. Sosa,
Juan A. Montiel-Nelson,
A. Zwick,
X. P. Nguyen:
Movement recognition and strain lecture algorithm for fracture monitoring system.
ISCAS 2006 |
| 12 | EE | Victor Navarro-Botello,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications.
J. Low Power Electronics 2(2): 300-307 (2006) |
| 2004 |
|---|
| 11 | EE | José C. García,
Juan A. Montiel-Nelson,
J. Sosa,
Héctor Navarro:
A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit.
DATE 2004: 680-681 |
| 10 | EE | J. Sosa,
Juan A. Montiel-Nelson,
Héctor Navarro,
José C. García:
Functional Vector Generation for Combinational Circuits Based on Data Path Coverage Metric and Mixed Integer Linear Programming.
ISQED 2004: 217-222 |
| 2001 |
|---|
| 9 | EE | Juan A. Montiel-Nelson,
V. de Armas,
Roberto Sarmiento,
Antonio Núñez,
Saeid Nooshabadi:
A compact layout technique to minimize high frequency switching effects in high speed circuits.
ISCAS (4) 2001: 96-99 |
| 8 | EE | J. Sosa,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
Efficient computation of the area/power consumption versus delay tradeoff curve for circuit critical path optimization.
ISCAS (5) 2001: 527-530 |
| 7 | EE | Juan A. Montiel-Nelson,
V. de Armas,
Roberto Sarmiento,
Antonio Núñez:
A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits.
ISQED 2001: 223- |
| 2000 |
|---|
| 6 | EE | Saeid Nooshabadi,
Juan A. Montiel-Nelson,
Antonio Núñez,
Roberto Sarmiento,
J. Sosa:
A Single Phase Latch for High Speed GaAs Domino Circuits.
DATE 2000: 760 |
| 1999 |
|---|
| 5 | EE | Juan A. Montiel-Nelson,
Saeid Nooshabadi,
V. de Armas,
Roberto Sarmiento,
Antonio Núñez:
High Speed GaAs Subsystem Design using Feed Through Logic.
DATE 1999: 509- |
| 1998 |
|---|
| 4 | EE | Juan A. Montiel-Nelson,
V. de Armas,
Roberto Sarmiento,
Antonio Núñez:
A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design.
DATE 1998: 947-948 |
| 3 | EE | Roberto Sarmiento,
V. de Armas,
José Francisco López,
Juan A. Montiel-Nelson,
Antonio Núñez:
A CORDIC processor for FFT computation and its implementation using gallium arsenide technology.
IEEE Trans. VLSI Syst. 6(1): 18-30 (1998) |
| 1997 |
|---|
| 2 | EE | Kamran Eshraghian,
Juan A. Montiel-Nelson,
Saeid Nooshabadi:
An Asynchronous Morphological Processor for Multi-Media Applications.
VLSI Design 1997: 336-341 |
| 1 | EE | Saeid Nooshabadi,
Juan A. Montiel-Nelson,
G. S. Visweswaran,
D. Nagchoudhuri:
Micropipeline Architecture for Multiplier-less FIR Filters.
VLSI Design 1997: 451-456 |
