Nagu R. Dhanwada

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16EEReinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer: Exploring power management in multi-core systems. ASP-DAC 2008: 708-713
15EEReinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214
14EEIng-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada: Transaction Level Error Susceptibility Model for Bus Based SoC Architectures. ISQED 2006: 775-780
13EENagu R. Dhanwada, Alex Doboli, Adrián Núñez-Aldana, Ranga Vemuri: Hierarchical constraint transformation based on genetic optimization for analog system synthesis. Integration 39(3): 267-290 (2006)
12EENagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan: A power estimation methodology for systemC transaction level models. CODES+ISSS 2005: 142-147
11EEWei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner: Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD 2005: 689-696
10EEJingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu: Architecting voltage islands in core-based system-on-a-chip designs. ISLPED 2004: 180-185
9EEAlex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications. ACM Trans. Design Autom. Electr. Syst. 9(2): 238-271 (2004)
8EEShyam Ramji, Nagu R. Dhanwada: Design topology aware physical metrics for placement analysis. ACM Great Lakes Symposium on VLSI 2003: 186-191
7EEReinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal: SEAS: a system for early analysis of SoCs. CODES+ISSS 2003: 150-155
6EENagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis. ASP-DAC 1999: 153-156
5EEAlex Doboli, Adrián Núñez-Aldana, Nagu R. Dhanwada, Sree Ganesan, Ranga Vemuri: Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration. DAC 1999: 951-957
4EENagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: Hierarchical Constraint Transformation Using Directed Interval Search for Analog System Synthesis. DATE 1999: 328-
3EENagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis. ISCAS (6) 1999: 362-365
2 Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: Component Characterization and Constraint Transformation Based on Directed Intervals for Analog Synthesis. VLSI Design 1999: 589-596
1EENagu R. Dhanwada, Ranga Vemuri: Constraint Allocation in Analog System Synthesis. VLSI Design 1998: 253-258

Coauthor Index

1Emrah Acar [15]
2Reinaldo A. Bergamaschi [7] [15] [16]
3Subhrajit Bhattacharya [7]
4Pradip Bose [15] [16]
5Alper Buyuktosunoglu [15] [16]
6John Conner [11]
7John A. Darringer [7] [15] [16]
8Gero Dittmann [15] [16]
9Alex Doboli (Alexa Doboli) [5] [9] [13]
10William E. Dougherty [7]
11Sree Ganesan [5]
12Guoling Han [15] [16]
13Jingcao Hu [10]
14Zhigang Hu [16]
15Wei-Lun Hung [11]
16Geert Janssen [15] [16]
17Dorothy Kucar [15]
18Ing-Chao Lin [12] [14]
19Greg M. Link [11]
20Radu Marculescu [10]
21Indira Nair [7] [15] [16]
22Gi-Joon Nam [15]
23Vijay Narayanan [12]
24Adrián Núñez-Aldana [2] [3] [4] [5] [6] [9] [13]
25Sarala Paliwal [7]
26Hiren D. Patel [15] [16]
27Shyam Ramji [8]
28Youngsoo Shin [7] [10]
29Suresh Srinivasan [14]
30Ranga Vemuri [1] [2] [3] [4] [5] [6] [9] [13]
31Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [11] [14]
32Yuan Xie [11]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)