| 2001 |
|---|
| 4 | EE | Nagaraj Ns,
Poras T. Balsara,
Cyrus D. Cantrell:
Crosstalk Noise Verification in Digital Designs with Interconnect Process Variations.
VLSI Design 2001: 365-370 |
| 1999 |
|---|
| 3 | EE | Lun Ye,
Foong-Charn Chang,
Peter Feldmann,
Rakesh Chadha,
Nagaraj Ns,
Frank Cano:
Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs.
DATE 1999: 658-663 |
| 2 | EE | Nagaraj Ns,
Frank Cano,
Sudha Thiruvengadam,
Deepak Kapoor:
Performance and Reliability Verification of C6201/C6701 Digital Signal Processors.
ICCD 1999: 521- |
| 1 | | Nagaraj Ns,
Poras T. Balsara,
Cyrus D. Cantrell:
Mini-Tutorial: Bridging the Gap between TCAD and ECAD Methodologies in Deep Sub-Micron Interconnect Extraction and Analysis.
VLSI Design 1999: 6-11 |
