Kamran Zarrineh

2008
16	EE	Kamran Zarrineh: Design for Test Challenges of High Performance/Low Power Microprocessors. DFT 2008: 503-503
2003
15	EE	Michael G. Wahl, Sudipta Bhawmik, Kamran Zarrineh, Pradipta Ghosh, Scott Davidson, Peter Harrod: The P1500 DFT Disclosure Document: A Standard to Communicate Mergeable Core DFT Data. ITC 2003: 998-1007
2001
14	EE	Pradeep Nagaraj, Shambhu Upadhaya, Kamran Zarrineh, R. Dean Adams: Defect Analysis and a New Fault Model for Multi-port SRAMs. DFT 2001: 366-374
13		Kamran Zarrineh, Thomas A. Ziaja, Amitava Majumdar: Automatic Generation and Validation of Memory Test Models for High Performance Microprocessors. ICCD 2001: 526-529
12	EE	Kamran Zarrineh, Shambhu J. Upadhyaya, Vivek Chickermane: System-on-Chip Testability Using LSSD Scan Structures. IEEE Design & Test of Computers 18(3): 83-97 (2001)
11	EE	Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty: Automatic generation and compaction of March tests for memory arrays. IEEE Trans. VLSI Syst. 9(6): 845-857 (2001)
2000
10		Kamran Zarrineh, R. Dean Adams, Thomas J. Eckenrode, Steven P. Gregor: Self test architecture for testing complex memory structures. ITC 2000: 547-556
9	EE	Kamran Zarrineh, R. Dean Adams, Aneesha P. Deo: Defect Analysis and Realistic Fault Model Extensions for Static Random Access Memories. MTDT 2000: 119-124
1999
8	EE	Kamran Zarrineh, Shambhu J. Upadhyaya: On Programmable Memory Built-In Self Test Architectures. DATE 1999: 708-713
7	EE	Kamran Zarrineh, Shambhu J. Upadhyaya: Programmable Memory BIST and a New Synthesis Framework. FTCS 1999: 352-355
6	EE	Kamran Zarrineh, Shambhu J. Upadhyaya: A design for test perspective on memory synthesis. ISCAS (1) 1999: 101-104
5	EE	Kamran Zarrineh, Shambhu J. Upadhyaya: A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units. VTS 1999: 391-397
1998
4	EE	Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty: A new framework for generating optimal March tests for memory arrays. ITC 1998: 73-
3	EE	Kamran Zarrineh, Shambhu J. Upadhyaya, Philip Shephard III: Automatic Insertion of Scan Structures to Enhance Testability of Embedded Memories, Cores and Chips. VTS 1998: 98-105
1997
2		Vivek Chickermane, Kamran Zarrineh: Addressing Early Design-For-Test Synthesis in a Production Environment. ITC 1997: 246-255
1996
1	EE	Kamran Zarrineh, Vivek Chickermane, Gareth Nicholls, Mike Palmer: A Design For Test Perspective on I/O Management. ICCD 1996: 46-

Coauthor Index

1	R. Dean Adams	[9] [10] [14]
2	Sudipta Bhawmik	[15]
3	Sreejit Chakravarty	[4] [11]
4	Vivek Chickermane	[1] [2] [12]
5	Scott Davidson	[15]
6	Aneesha P. Deo	[9]
7	Thomas J. Eckenrode	[10]
8	Pradipta Ghosh	[15]
9	Steven P. Gregor	[10]
10	Peter Harrod	[15]
11	Amitava Majumdar	[13]
12	Pradeep Nagaraj	[14]
13	Gareth Nicholls	[1]
14	Mike Palmer	[1]
15	Philip Shephard III	[3]
16	Shambhu Upadhaya	[14]
17	Shambhu J. Upadhyaya	[3] [4] [5] [6] [7] [8] [11] [12]
18	Michael G. Wahl	[15]
19	Thomas A. Ziaja	[13]

Colors in the list of coauthors