2008 |
14 | EE | Maryam Shojaei Baghini,
Sudip Nag,
Rakesh K. Lal,
Dinesh Kumar Sharma:
An Ultra-Low-Power Current-Mode Integrated CMOS Instrumentation amplifier for Personal ECG Recorders.
Journal of Circuits, Systems, and Computers 17(6): 1053-1067 (2008) |
2004 |
13 | EE | Jason Helge Anderson,
Sudip Nag,
Kamal Chaudhary,
Sandor Kalman,
Chari Madabhushi,
Paul Cheng:
Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis.
FPL 2004: 168-178 |
2000 |
12 | EE | Jason Helge Anderson,
Jim Saunders,
Sudip Nag,
Chari Madabhushi,
Rajeev Jayaraman:
A Placement Algorithm for FPGA Designs with Multiple I/O Standards.
FPL 2000: 211-220 |
1999 |
11 | EE | Sudip Nag,
Kamal Chaudhary:
Post-Placement Residual-Overlap Removal with Minimal Movement.
DATE 1999: 581-586 |
10 | | Sudip Nag,
H. K. Verma,
Kaushik Roy:
VLSI Signal Processing in FPGAs.
VLSI Design 1999: 609 |
1998 |
9 | EE | Sudip Nag,
Rob A. Rutenbar:
Performance-driven simultaneous placement and routing for FPGA's.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(6): 499-518 (1998) |
1995 |
8 | | Kaushik Roy,
Sudip Nag:
On Routability for FPGAs under Faulty Conditions.
IEEE Trans. Computers 44(11): 1296-1305 (1995) |
1994 |
7 | EE | Sudip Nag,
Rob A. Rutenbar:
Performance-Driven Simultaneous Place and Route for Row-Based FPGAs.
DAC 1994: 301-307 |
6 | | Kaushik Roy,
Sudip Nag:
On Channel Architecture and Routability for FPGAs Under Faulty Conditions.
FPL 1994: 361-372 |
5 | | Santanu Dutta,
Sudip Nag,
Kaushik Roy:
ASAP: A Transistor Sizing Tool for Speed Area and Power Optimization of Static CMOS Circuits.
ISCAS 1994: 61-64 |
4 | EE | Kaushik Roy,
Sudip Nag:
Automatic synthesis of FPGA channel architecture for routability and performance.
IEEE Trans. VLSI Syst. 2(4): 508-511 (1994) |
1993 |
3 | EE | Sudip Nag,
Kaushik Roy:
Iterative Wirability and Performance Improvement for FPGAs.
DAC 1993: 321-325 |
2 | | Kaushik Roy,
Sudip Nag,
Santanu Dutta:
Channel Architecture Optimization for Performance and Routability of Row-Based FPGAs.
ICCD 1993: 220-223 |
1992 |
1 | EE | Sujoy Mitra,
Sudip Nag,
Rob A. Rutenbar,
L. Richard Carley:
System-level routing of mixed-signal ASICs in WREN.
ICCAD 1992: 394-399 |