Jiro Naganuma

2008
14	EE	Takayuki Onishi, Takashi Sano, Koyo Nitta, Mitsuo Ikeda, Jiro Naganuma: Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI. ISCAS 2008: 800-803
2007
13	EE	Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Toshihiro Minami, Makoto Endo, Yoshiyuki Yashima: Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level. IEEE Trans. VLSI Syst. 15(9): 1055-1059 (2007)
2006
12	EE	Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima: Highly accurate de-jittering scheme for broadcast quality video transmission. Systems and Computers in Japan 37(10): 81-88 (2006)
2005
11	EE	Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima: MPEG-2 real-time software CODEC for full-duplex transmission application over IP networks. Systems and Computers in Japan 36(2): 33-41 (2005)
2004
10		Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima: A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level. ISCAS (2) 2004: 261-264
2003
9	EE	Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Makoto Endo: Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level. DATE 2003: 20002-20007
2002
8	EE	Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Takeshi Ogura: Advanced concurrent design environment for multimedia system LSIs. Systems and Computers in Japan 33(14): 72-80 (2002)
1999
7	EE	Katsuyuki Ochiai, Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura: High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit. DATE 1999: 303-308
6	EE	Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Jiro Naganuma, Takeshi Ogura: An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture. DATE 1999: 44-
5	EE	Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura: On-Chip Multimedia Real-Time OS and its MPEG-2 Applications. RTCSA 1999: 200-203
4	EE	M. Inamori, Jiro Naganuma, Makoto Endo: A memory-based architecture for MPEG2 system protocol LSIs. IEEE Trans. VLSI Syst. 7(3): 339-344 (1999)
1994
3		Jiro Naganuma, Takeshi Ogura, Tamio Hoshino: High-Level Design Validation Using Algorithmic Debugging. EDAC-ETC-EUROASIC 1994: 474-480
2		Jiro Naganuma, Takeshi Ogura: A Highly OR-Parallel Inference Machine (Multi-ASCA) and Its Performance Evaluation: An Architecture and Its Load Balancing Algorithms. IEEE Trans. Computers 43(9): 1062-1075 (1994)
1988
1		Jiro Naganuma, Takeshi Ogura, Shin-Ichiro Yamada, Takashi Kimura: High-Speed CAM-Based Architecture for a Prolog Machine (ASCA). IEEE Trans. Computers 37(11): 1375-1383 (1988)

Coauthor Index

1	Makoto Endo	[4] [5] [7] [8] [9] [10] [11] [12] [13]
2	Tamio Hoshino	[3]
3	Mitsuo Ikeda	[6] [9] [10] [12] [13] [14]
4	M. Inamori	[4]
5	Hiroe Iwasaki	[5] [7] [8] [9] [11] [13]
6	Takashi Kimura	[1]
7	Toshio Kondo	[6]
8	Toshihiro Minami	[6] [13]
9	Yasuyuki Nakajima	[9] [13]
10	Ken Nakamura	[9] [13]
11	Koyo Nitta	[6] [9] [13] [14]
12	Katsuyuki Ochiai	[7] [8]
13	Mitsuo Ogura	[9] [13]
14	Takeshi Ogura	[1] [2] [3] [5] [6] [7] [8]
15	Takayuki Onishi	[9] [10] [12] [13] [14]
16	Takashi Sano	[14]
17	Kazuhito Suguri	[6]
18	Yutaka Tashiro	[9] [13]
19	Shin-Ichiro Yamada	[1]
20	Yoshiyuki Yashima	[10] [11] [12] [13]
21	Takeshi Yoshitome	[6] [9] [13]