| 2004 |
|---|
| 22 | EE | Houssem Haddar,
Rainer Kress:
On the Fr[e-acute]chet Derivative for Obstacle Scattering with an Impedance Boundary Condition.
SIAM Journal of Applied Mathematics 65(1): 194-208 (2004) |
| 2000 |
|---|
| 21 | EE | Rainer Kress,
Andreas Pyttel,
Alexander Sedlmeier:
FPGA-Based Prototyping for Product Definition.
FPL 2000: 78-86 |
| 1999 |
|---|
| 20 | EE | Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress:
Java Driven Codesign and Prototyping of Networked Embedded Systems.
DAC 1999: 794-797 |
| 19 | EE | Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress:
Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components.
DATE 1999: 768-769 |
| 18 | | Rainer Kress,
Andreas Pyttel:
Debugging Application-Specific Programmable Products.
FPL 1999: 481-486 |
| 1998 |
|---|
| 17 | EE | Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress:
A hardware/software prototyping environment for dynamically reconfigurable embedded systems.
CODES 1998: 105-109 |
| 16 | EE | Michael Mrva,
Klaus Buchenrieder,
Rainer Kress:
A Scalable Architecture for Multi-threaded JAVA Applications.
DATE 1998: 868-874 |
| 15 | EE | Rainer Kress,
Andreas Pyttel:
High-Level Synthesis for Dynamically Reconfigurable Hardware/Software Systems.
FPL 1998: 288-297 |
| 1997 |
|---|
| 14 | | Rainer Kress,
Reiner W. Hartenstein,
Ulrich Nageldinger:
An operating system for custom computing machines based on the Xputer paradigm.
FPL 1997: 304-313 |
| 1996 |
|---|
| 13 | EE | Reiner W. Hartenstein,
Jürgen Becker,
Michael Herz,
Rainer Kress,
Ulrich Nageldinger:
A Synthesis System For Bus-Based Wavefront Array Architectures.
ASAP 1996: 274-283 |
| 12 | EE | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress:
Two-level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine.
CODES 1996: 77-84 |
| 11 | EE | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress:
Two-Level Hardware/Software Partitioning Using CoDe-X.
ECBS 1996: 395- |
| 10 | | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress:
Custom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view.
FPL 1996: 65-76 |
| 9 | EE | Reiner W. Hartenstein,
Jürgen Becker,
Michael Herz,
Rainer Kress,
Ulrich Nageldinger:
A Partitioning Programming Environment for a Novel Parallel Architecture.
IPPS 1996: 544-548 |
| 8 | EE | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress,
Helmut Reinig:
CoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework.
VLSI Design 1996: 81-84 |
| 7 | | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress,
Helmut Reinig:
High-performance computing using a reconfigurable accelerator.
Concurrency - Practice and Experience 8(6): 429-443 (1996) |
| 1995 |
|---|
| 6 | EE | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress,
Helmut Reinig,
Karin Schmidt:
A Parallelizing Compilation Method for the Map-oriented Machine.
ASAP 1995: 129-132 |
| 5 | EE | Reiner W. Hartenstein,
Rainer Kress:
A datapath synthesis system for the reconfigurable datapath architecture.
ASP-DAC 1995 |
| 4 | EE | David Colton,
Rainer Kress:
Eigenvalues of the Far Field Operator for the Helmholtz Equation in an Absorbing Medium.
SIAM Journal of Applied Mathematics 55(6): 1724-1735 (1995) |
| 1994 |
|---|
| 3 | | Reiner W. Hartenstein,
Rainer Kress,
Helmut Reinig:
A New FPGA Architecture for Word-Oriented Datapaths.
FPL 1994: 144-155 |
| 2 | | Andreas Ast,
Jürgen Becker,
Reiner W. Hartenstein,
Rainer Kress,
Helmut Reinig,
Karin Schmidt:
Data-Procedural Languages for FPL-based Machines.
FPL 1994: 183-195 |
| 1992 |
|---|
| 1 | | Andreas Ast,
Reiner W. Hartenstein,
Rainer Kress,
Helmut Reinig,
Karin Schmidt:
Novel High Performance Machine Paradigms and Fast- Turnaround ASIC Design Methods.
FPL 1992: 211-217 |
