2007 |
13 | EE | Martin Schickel,
Martin Oberkönig,
Martin Schweikert,
Hans Eveking:
A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set.
FDL 2007: 291-292 |
12 | EE | Martin Oberkönig,
Martin Schickel,
Hans Eveking:
A Quantitative Completeness Analysis for Property-Sets.
FMCAD 2007: 158-161 |
11 | EE | Hans Eveking,
Martin Braun,
Martin Schickel,
Martin Schweikert,
Volker Nimbler:
Multi-Level Assertion-Based Design.
MEMOCODE 2007: 85-86 |
2006 |
10 | EE | Martin Schickel,
Volker Nimbler,
Martin Braun,
Hans Eveking:
On Consistency and Completeness of Property-Sets.
FDL 2006: 241-248 |
2003 |
9 | | Manfred Glesner,
Ricardo Augusto da Luz Reis,
Hans Eveking,
Vincent John Mooney III,
Leandro Soares Indrusiak,
Peter Zipf:
IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003
Technische Universität Darmstadt, Insitute of Microelectronic Systems 2003 |
1999 |
8 | EE | Gerd Ritter,
Holger Hinrichsen,
Hans Eveking:
Formal Verification of Descriptions with Distinct Order of Memory Operations.
ASIAN 1999: 308-321 |
7 | EE | Gerd Ritter,
Hans Eveking,
Holger Hinrichsen:
Formal Verification of Designs with Complex Control by Symbolic Simulation.
CHARME 1999: 234-249 |
6 | EE | Hans Eveking,
Holger Hinrichsen,
Gerd Ritter:
Automatic Verification of Scheduling Results in High-Level Synthesis.
DATE 1999: 59-64 |
1995 |
5 | | Paolo Camurati,
Hans Eveking:
Correct Hardware Design and Verification Methods, IFIP WG 10.5 Advanced Research Working Conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995, Proceedings
Springer 1995 |
1994 |
4 | EE | Hans Eveking:
(V)HDL-based verification of heterogeneous synchronous/asynchronous systems.
EURO-DAC 1994: 566-571 |
1993 |
3 | EE | Hans Eveking,
Stefan Höreth:
Optimization and Resynthesis of Complex Data-Paths.
DAC 1993: 637-641 |
1990 |
2 | | Hans Eveking:
Automatic Verification of Extensions of Hardware Descriptions.
CAV 1990: 2-12 |
1 | EE | Hans Eveking,
Christoph Mai:
Formal verification of timing conditions.
EURO-DAC 1990: 512-517 |