2006 |
21 | EE | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures.
FPL 2006: 1-8 |
2005 |
20 | EE | Fredy Rivera,
Milagros Fernández,
Nader Bagherzadeh:
An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures.
DSD 2005: 396-402 |
19 | EE | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures.
IPDPS 2005 |
2004 |
18 | EE | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures.
CODES+ISSS 2004: 30-35 |
2003 |
17 | EE | Marcos Sanchez-Elez,
Milagros Fernández,
Manuel L. Anido,
Haitao Du,
Nader Bagherzadeh,
Román Hermida:
Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures.
DATE 2003: 10036-10043 |
16 | EE | Haitao Du,
Marcos Sanchez-Elez,
Nozar Tabrizi,
Nader Bagherzadeh,
Manuel L. Anido,
Milagros Fernández:
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys.
DATE 2003: 20144-20149 |
15 | EE | Marcos Sanchez-Elez,
Haitao Du,
Nozar Tabrizi,
Yun Long,
Nader Bagherzadeh,
Milagros Fernández:
Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture.
Computers & Graphics 27(5): 701-713 (2003) |
2002 |
14 | EE | Marcos Sanchez-Elez,
Milagros Fernández,
Rafael Maestre,
Rafael Maestre,
Fadi J. Kurdahi,
Román Hermida,
Nader Bagherzadeh:
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures.
DATE 2002: 547-552 |
2001 |
13 | | Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Rafael Maestre,
Fadi J. Kurdahi,
Nader Bagherzadeh:
A data scheduler for multi-context reconfigurable architectures.
ISSS 2001: 177-182 |
12 | EE | Rafael Maestre,
F. Kurdahl,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
A formal approach to context scheduling for multicontext reconfigurable architectures.
IEEE Trans. VLSI Syst. 9(1): 173-185 (2001) |
11 | EE | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
A framework for reconfigurable computing: task scheduling and context management.
IEEE Trans. VLSI Syst. 9(6): 858-873 (2001) |
2000 |
10 | EE | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh:
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures.
FCCM 2000: 297-298 |
9 | EE | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh:
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures.
ICCD 2000: 575-576 |
8 | EE | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Nader Bagherzadeh,
Hartej Singh:
Configuration Management in Multi-Context Reconfigurable Systems for Simultaneous Performance and Power Optimization.
ISSS 2000: 107-114 |
1999 |
7 | EE | Rafael Maestre,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh,
Román Hermida,
Milagros Fernández:
Kernel Scheduling in Reconfigurable Computing.
DATE 1999: 90-96 |
6 | EE | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
A Framework for Scheduling and Context Allocation in Reconfigurable Computing.
ISSS 1999: 134-140 |
1997 |
5 | EE | José M. Mendías,
Román Hermida,
Milagros Fernández:
Formal Techniques for Hardware Allocation.
VLSI Design 1997: 161-165 |
4 | EE | Hortensia Mecha,
Milagros Fernández:
Interconnection Delay and Clock Cycle Selection in High Level Synthesis.
VLSI Design 1997: 504-505 |
3 | EE | R. Moreno,
Román Hermida,
Milagros Fernández,
Hortensia Mecha:
A unified approach for scheduling and allocation.
Integration 23(1): 1-35 (1997) |
1996 |
2 | EE | R. Moreno,
Román Hermida,
Milagros Fernández:
Register estimation in unscheduled dataflow graphs.
ACM Trans. Design Autom. Electr. Syst. 1(3): 396-403 (1996) |
1 | EE | Hortensia Mecha,
Milagros Fernández,
Francisco Tirado,
Julio Septién,
D. Motes,
Katzalin Olcoz:
A method for area estimation of data-path in high level synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(2): 258-265 (1996) |