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Milagros Fernández

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2006
21EEFredy Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh: Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures. FPL 2006: 1-8
2005
20EEFredy Rivera, Milagros Fernández, Nader Bagherzadeh: An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures. DSD 2005: 396-402
19EEFredy Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh: Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures. IPDPS 2005
2004
18EEFredy Rivera, Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Nader Bagherzadeh: Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures. CODES+ISSS 2004: 30-35
2003
17EEMarcos Sanchez-Elez, Milagros Fernández, Manuel L. Anido, Haitao Du, Nader Bagherzadeh, Román Hermida: Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures. DATE 2003: 10036-10043
16EEHaitao Du, Marcos Sanchez-Elez, Nozar Tabrizi, Nader Bagherzadeh, Manuel L. Anido, Milagros Fernández: Interactive Ray Tracing on Reconfigurable SIMD MorphoSys. DATE 2003: 20144-20149
15EEMarcos Sanchez-Elez, Haitao Du, Nozar Tabrizi, Yun Long, Nader Bagherzadeh, Milagros Fernández: Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture. Computers & Graphics 27(5): 701-713 (2003)
2002
14EEMarcos Sanchez-Elez, Milagros Fernández, Rafael Maestre, Rafael Maestre, Fadi J. Kurdahi, Román Hermida, Nader Bagherzadeh: A Complete Data Scheduler for Multi-Context Reconfigurable Architectures. DATE 2002: 547-552
2001
13 Marcos Sanchez-Elez, Milagros Fernández, Román Hermida, Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh: A data scheduler for multi-context reconfigurable architectures. ISSS 2001: 177-182
12EERafael Maestre, F. Kurdahl, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh: A formal approach to context scheduling for multicontext reconfigurable architectures. IEEE Trans. VLSI Syst. 9(1): 173-185 (2001)
11EERafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh: A framework for reconfigurable computing: task scheduling and context management. IEEE Trans. VLSI Syst. 9(6): 858-873 (2001)
2000
10EERafael Maestre, Milagros Fernández, Román Hermida, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh: Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures. FCCM 2000: 297-298
9EERafael Maestre, Milagros Fernández, Román Hermida, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh: Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures. ICCD 2000: 575-576
8EERafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Nader Bagherzadeh, Hartej Singh: Configuration Management in Multi-Context Reconfigurable Systems for Simultaneous Performance and Power Optimization. ISSS 2000: 107-114
1999
7EERafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh, Román Hermida, Milagros Fernández: Kernel Scheduling in Reconfigurable Computing. DATE 1999: 90-96
6EERafael Maestre, Milagros Fernández, Román Hermida, Nader Bagherzadeh: A Framework for Scheduling and Context Allocation in Reconfigurable Computing. ISSS 1999: 134-140
1997
5EEJosé M. Mendías, Román Hermida, Milagros Fernández: Formal Techniques for Hardware Allocation. VLSI Design 1997: 161-165
4EEHortensia Mecha, Milagros Fernández: Interconnection Delay and Clock Cycle Selection in High Level Synthesis. VLSI Design 1997: 504-505
3EER. Moreno, Román Hermida, Milagros Fernández, Hortensia Mecha: A unified approach for scheduling and allocation. Integration 23(1): 1-35 (1997)
1996
2EER. Moreno, Román Hermida, Milagros Fernández: Register estimation in unscheduled dataflow graphs. ACM Trans. Design Autom. Electr. Syst. 1(3): 396-403 (1996)
1EEHortensia Mecha, Milagros Fernández, Francisco Tirado, Julio Septién, D. Motes, Katzalin Olcoz: A method for area estimation of data-path in high level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 15(2): 258-265 (1996)

Coauthor Index

1Manuel Lois Anido (Manuel L. Anido) [16] [17]
2Nader Bagherzadeh [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21]
3Haitao Du [15] [16] [17]
4Román Hermida [2] [3] [5] [6] [7] [9] [10] [11] [12] [13] [14] [17] [18] [19] [21]
5Fadi J. Kurdahi [7] [8] [9] [10] [11] [13] [14]
6F. Kurdahl [12]
7Yun Long [15]
8Rafael Maestre [6] [7] [8] [9] [10] [11] [12] [13] [14]
9Hortensia Mecha [1] [3] [4]
10Jose Manuel Mendias (José M. Mendías) [5]
11R. Moreno [2] [3]
12D. Motes [1]
13Katzalin Olcoz [1]
14Fredy Rivera [18] [19] [20] [21]
15Marcos Sanchez-Elez [13] [14] [15] [16] [17] [18] [19] [21]
16Julio Septién [1]
17Hartej Singh [7] [8] [9] [10] [11] [12]
18Nozar Tabrizi [15] [16]
19Francisco Tirado [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)