2003 |
19 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Scheduling battery usage in mobile systems.
IEEE Trans. VLSI Syst. 11(6): 1136-1143 (2003) |
2001 |
18 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Extending lifetime of portable systems by battery scheduling.
DATE 2001: 197-203 |
17 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Riccardo Scarsi:
Battery-Driven Dynamic Power Management.
IEEE Design & Test of Computers 18(2): 53-60 (2001) |
16 | EE | Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Stream synthesis for efficient power simulation based on spectral transforms.
IEEE Trans. VLSI Syst. 9(3): 417-426 (2001) |
15 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Discrete-time battery models for system-level low-power design.
IEEE Trans. VLSI Syst. 9(5): 630-640 (2001) |
2000 |
14 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
A Discrete-Time Battery Model for High-Level Power Estimation.
DATE 2000: 35- |
13 | EE | Andrea Acquaviva,
Riccardo Scarsi:
A spatially-adaptive bus interface for low-switching communication (poster session).
ISLPED 2000: 238-240 |
12 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Riccardo Scarsi:
Battery-Driven Dynamic Power Management of Portable Systems.
ISSS 2000: 25-33 |
11 | EE | Luca Benini,
Giovanni De Micheli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Glitch power minimization by selective gate freezing.
IEEE Trans. VLSI Syst. 8(3): 287-298 (2000) |
10 | EE | Luca Benini,
Giovanni De Micheli,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
A multilevel engine for fast power simulation of realistic inputstreams.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(4): 459-472 (2000) |
9 | EE | Luca Benini,
Alberto Macii,
Massimo Poncino,
Riccardo Scarsi:
Architectures and synthesis algorithms for power-efficient businterfaces.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 969-980 (2000) |
1999 |
8 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses.
DAC 1999: 128-133 |
7 | EE | Luca Benini,
Giovanni De Micheli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Glitch Power Minimization by Gate Freezing.
DATE 1999: 163-167 |
6 | EE | Alberto Macii,
Enrico Macii,
Giuseppe Odasso,
Massimo Poncino,
Riccardo Scarsi:
Regression-Based Macromodeling for Delay Estimation of Behavioral Components.
Great Lakes Symposium on VLSI 1999: 188-191 |
5 | EE | Luca Benini,
Giovanni De Micheli,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers.
ACM Trans. Design Autom. Electr. Syst. 4(4): 351-375 (1999) |
1998 |
4 | EE | Fabrizio Ferrandi,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi,
Fabio Somenzi:
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits.
ICCAD 1998: 235-241 |
3 | EE | Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Stream synthesis for efficient power simulation based on spectral transforms.
ISLPED 1998: 30-35 |
1997 |
2 | EE | Luca Benini,
Giovanni De Micheli,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks.
ED&TC 1997: 514-520 |
1 | EE | Luca Benini,
Giovanni De Micheli,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Fast power estimation for deterministic input streams.
ICCAD 1997: 494-501 |