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Jochen A. G. Jess

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2006
43EEJochen A. G. Jess, K. Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah: Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2376-2392 (2006)
2003
42EEJochen A. G. Jess, K. Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah: Statistical timing for parametric yield prediction of digital integrated circuits. DAC 2003: 932-937
41EEJochen A. G. Jess: Codeübersetzung unter Zeitvorgaben für eingebettete Signalprozessoren. it - Information Technology 45(6): (2003)
2001
40EECarlos A. Alba Pinto, Bart Mesman, Koen Van Eijk, Jochen A. G. Jess: Constraint satisfaction for storage files with Fifos or stacks during scheduling. DATE 2001: 824
39EECarlos A. Alba Pinto, Bart Mesman, Jochen A. G. Jess: Constraint Satisfaction for Relative Location Assignment and Scheduling. ICCAD 2001: 384-390
38 Marco Bekooij, Jochen A. G. Jess, Jef L. van Meerbergen: Phase coupled operation assignment for VLIW processors with distributed register files. ISSS 2001: 118-123
37 Qin Zhao, Twan Basten, Bart Mesman, C. A. J. van Eijk, Jochen A. G. Jess: Static resource models of instruction sets. ISSS 2001: 159-164
2000
36EELuiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, J. Van Eijnhoven, Jochen A. G. Jess: A code-motion pruning technique for global scheduling. ACM Trans. Design Autom. Electr. Syst. 5(1): 1-38 (2000)
35EEKoen Van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef L. van Meerbergen, Jochen A. G. Jess: Constraint analysis for code generation: basic techniques and applications in FACTS. ACM Trans. Design Autom. Electr. Syst. 5(4): 774-793 (2000)
34EEJochen A. G. Jess: Designing electronic engines with electronic engines: 40 years ofbootstrapping of a technology upon itself. IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1404-1427 (2000)
1999
33EELuiz C. V. dos Santos, Jochen A. G. Jess: A Reordering Technique for Efficient Code Motion. DAC 1999: 296-299
32EELuiz C. V. dos Santos, Jochen A. G. Jess: Exploiting State Equivalence on the Fly while Applying Code Motion and Speculation. DATE 1999: 609-
31EEBart Mesman, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess: Constraint analysis for DSP code generation. IEEE Trans. on CAD of Integrated Circuits and Systems 18(1): 44-57 (1999)
1998
30EEJeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess: Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor. DATE 1998: 125-131
29EEBart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess: A Constraint Driven Approach to Loop Pipelining and Register Binding. DATE 1998: 377-383
1997
28EEJeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess: PROPHID: a data-driven multi-processor architecture for high-performance DSP. ED&TC 1997: 611
27 Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess: PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia. ICCD 1997: 164-169
26EEBart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess: Constraint Analysis for DSP Code Generation. ISSS 1997: 33-40
1996
25EELuiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, Jos T. J. van Eijndhoven, Jochen A. G. Jess: A Constructive Method for Exploiting Code Motion. ISSS 1996: 51-56
24EEMichel R. C. M. Berkelaar, Pim H. W. Buurman, Jochen A. G. Jess: Computing the entire active area/power consumption versus delay tradeoff curve for gate sizing with a piecewise linear simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 15(11): 1424-1434 (1996)
23EEChennian Di, Jochen A. G. Jess: An efficient CMOS bridging fault simulator: with SPICE accuracy. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1071-1080 (1996)
1995
22EEMarc J. M. Heijligers, L. J. M. Cluitmans, Jochen A. G. Jess: High-level synthesis scheduling and allocation using genetic algorithms. ASP-DAC 1995
21EEAdwin H. Timmer, Marino T. J. Strik, Jef L. van Meerbergen, Jochen A. G. Jess: Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores. DAC 1995: 593-598
1994
20 Jochen A. G. Jess, Richard L. Rudell: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994, San Jose, California, USA, November 6-10, 1994 IEEE Computer Society 1994
19EEHua Xue, Ed P. Huijbregts, Jochen A. G. Jess: Routing for Manufacturability. DAC 1994: 402-406
18 Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen A. G. Jess: On Design Rule Correct Maze Routing. EDAC-ETC-EUROASIC 1994: 407-411
17 Hua Xue, Chennian Di, Jochen A. G. Jess: Probability Analysis for CMOS Floating Gate Faults. EDAC-ETC-EUROASIC 1994: 443-448
16EEMichel R. C. M. Berkelaar, Pim H. W. Buurman, Jochen A. G. Jess: Computing the entire active area/power consumption versus delay trade-off curve for gate sizing with a piecewise linear simulator. ICCAD 1994: 474-480
15 M. J. M. Heijiligers, H. A. Hilderink, Adwin H. Timmer, Jochen A. G. Jess: NEAT: An Object Oriented High-Level Synthesis Interface. ISCAS 1994: 233-236
1993
14 Michael R. Lightner, Jochen A. G. Jess: Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993, Santa Clara, California, USA, November 7-11, 1993 IEEE Computer Society 1993
13 Hua Xue, Chennian Di, Jochen A. G. Jess: Fast Multi-Layer Critical Area Computation. DFT 1993: 117-124
12EEAdwin H. Timmer, Jochen A. G. Jess: Execution interval analysis under resource constraints. ICCAD 1993: 454-459
11EEHua Xue, Chennian Di, Jochen A. G. Jess: A net-oriented method for realistic fault analysis. ICCAD 1993: 78-83
10 M. M. A. van Rosmalen, Keith Baker, Eric Bruls, Jochen A. G. Jess: Parameter Monitoring: Advantages and Pitfalls. ITC 1993: 115-124
9 Chennian Di, Jochen A. G. Jess: On Accurate Modeling and Efficient Simulation of CMOS Opens. ITC 1993: 875-882
8 Ed P. Huijbregts, Jochen A. G. Jess: A Multiple Terminal Net Routing Algorithm Using Failure Prediction. VLSI Design 1993: 84-89
7EEEd P. Huijbregts, Jochen A. G. Jess: General gate array routing using a k-terminal net routing algorithm with failure prediction. IEEE Trans. VLSI Syst. 1(4): 473-481 (1993)
1991
6 Eric Bruls, F. Camerik, H. J. Kretschman, Jochen A. G. Jess: A Generic Method to Develop a Defect Monitoring System for IC Processes. ITC 1991: 218-227
1990
5 Gordon Adshead, Jochen A. G. Jess: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990 IEEE Computer Society 1990
4EEMichel R. C. M. Berkelaar, Jochen A. G. Jess: Gate sizing in MOS digital circuits with linear programming. EURO-DAC 1990: 217-221
1989
3 F. Camerik, P. A. J. Dirks, Jochen A. G. Jess: Qualification and Quantification of Process-Induced Product-Related Defects. ITC 1989: 643-652
2EEJosé Pineda de Gyvez, Jochen A. G. Jess: On the design and implementation of a wafer yield editor. IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 920-925 (1989)
1982
1 Jochen A. G. Jess, H. G. M. Kees: A Data Structure for Parallel L/U Decomposition. IEEE Trans. Computers 31(3): 231-239 (1982)

Coauthor Index

1Gordon Adshead [5]
2Keith Baker [10]
3Twan Basten [37]
4Marco Bekooij [35] [38]
5Michel R. C. M. Berkelaar [4] [16] [24]
6Eric Bruls (E. M. J. G. Bruls) [6] [10]
7Pim H. W. Buurman [16] [24]
8F. Camerik [3] [6]
9L. J. M. Cluitmans [22]
10Chennian Di [9] [11] [13] [17] [23]
11P. A. J. Dirks [3]
12C. A. J. van Eijk [25] [36] [37]
13Koen Van Eijk [35] [40]
14Jos T. J. van Eijndhoven [18] [25]
15J. Van Eijnhoven [36]
16José Pineda de Gyvez [2]
17M. J. M. Heijiligers [15]
18Marc J. M. Heijligers [22] [25] [36]
19H. A. Hilderink [15]
20Ed P. Huijbregts [7] [8] [18] [19]
21K. Kalafala [42] [43]
22H. G. M. Kees [1]
23H. J. Kretschman [6]
24Jeroen A. J. Leijten [27] [28] [30]
25Michael R. Lightner [14]
26Jef L. van Meerbergen [21] [26] [27] [28] [29] [30] [31] [35] [38]
27Bart Mesman [26] [29] [31] [35] [37] [39] [40]
28Srinath R. Naidu [42] [43]
29Ralph H. J. M. Otten [42] [43]
30Carlos A. Alba Pinto [35] [39] [40]
31M. M. A. van Rosmalen [10]
32Richard L. Rudell [20]
33Luiz C. V. dos Santos [25] [32] [33] [36]
34Marino T. J. Strik [21] [26] [29]
35Adwin H. Timmer [12] [15] [21] [26] [27] [28] [29] [30] [31]
36Chandramouli Visweswariah [42] [43]
37Hua Xue [11] [13] [17] [19]
38Qin Zhao [35] [37]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)