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João Paulo Teixeira

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2008
53EEJorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37
2007
52 Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300
51EEJorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311
50EEJorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172
49EEJorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212
2006
48 F. Guerreiro, Jorge Semião, A. Pierce, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. DDECS 2006: 279-284
47EEM. Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. IOLTS 2006: 257-262
2005
46 C. Leong, P. Bento, P. Rodrigues, A. Trindade, J. C. Silva, P. Lousã, J. Rego, J. Nobre, J. Varela, João Paulo Teixeira, Isabel C. Teixeira: Design and Test Methodology for a Reconfigurable PEM Data Acquisition Electronics System. FPL 2005: 523-526
45EEM. Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. IOLTS 2005: 281-286
44EED. Barros Júnior, M. Rodríguez-Irago, Marcelino B. Santos, Isabel C. Teixeira, Fabian Vargas, João Paulo Teixeira: Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip. J. Electronic Testing 21(4): 349-363 (2005)
2004
43EEA. Parreira, João Paulo Teixeira, Marcelino B. Santos: FPGAs BIST Evaluation. FPL 2004: 333-343
42EEDaniel Barros Jr., Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Modeling and Simulation of Time Domain Faults in Digital Systems. IOLTS 2004: 5-10
41 A. Parreira, João Paulo Teixeira, Marcelino B. Santos: Built-In Self-Test Quality Assessment Using Hardware Fault Emulation In FPGAs. Computers and Artificial Intelligence 23(5): (2004)
40EEMarcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, L. Balado, Joan Figueras: On High-Quality, Low Energy Built-In Self Test Preparation at RT-Level. J. Electronic Testing 20(4): 345-355 (2004)
2003
39EEMarcelino B. Santos, José M. Fernandes, Isabel C. Teixeira, João Paulo Teixeira: RTL Test Pattern Generation for High Quality Loosely Deterministic BIST. DATE 2003: 10994-10999
38EEA. Parreira, João Paulo Teixeira, A. Pantelimon, Marcelino B. Santos, José T. de Sousa: Fault Simulation Using Partially Reconfigurable Hardware. FPL 2003: 839-848
37EEFernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Property Coverage for Quality Assessment of Fault Tolerant or Fail Safe Systems. IOLTS 2003: 164-165
36EEJoão Paulo Teixeira, Diamantino Freitas: Evaluation of a Segmental Durations Model for TTS. PROPOR 2003: 40-48
35EEDaniela Braga, Diamantino Freitas, João Paulo Teixeira, Aldina Marques: On the Use of Prosodic Labelling in Corpus-Based Linguistic Studies of Spontaneous Speech. TSD 2003: 388-393
2002
34EEFernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Self-Checking and Fault Tolerance Quality Assessment Using Fault Sampling. DFT 2002: 216-224
33EEMarcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Rosa Rodríguez-Montañés, Joan Figueras: RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. ITC 2002: 814-823
32EEDiamantino Freitas, António Moura, Daniela Braga, Helder Ferreira, João Paulo Teixeira, Maria João Barros, Paulo Gouveia, Vagner Latsch: A Project of Speech Input and Output in an E-commerce Application. PorTAL 2002: 141-150
31EEMarcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: RTL Design Validation, DFT and Test Pattern Generation for High Defects Coverage. J. Electronic Testing 18(2): 179-187 (2002)
30EEFernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System. J. Electronic Testing 18(3): 285-294 (2002)
2001
29EEYervant Zorian, Paolo Prinetto, João Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, Octávio Páscoa Dias, Jorge Semião, Peter Muhmenthaler, W. Radermacher: Embedded tutorial: TRP: integrating embedded test and ATE. DATE 2001: 34-37
28 Hugo Lérias, João Luz, Pedro Moura, Ana Mendes, Isabel C. Teixeira, João Paulo Teixeira: Towards E-Management as Enabler for Accelerated Change. ICEIS (2) 2001: 807-814
27EEFernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Design and Test of Certifiable ASICs for Safety-Critical Gas Burners Contro. IOLTW 2001: 197-201
26 Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-level. ITC 2001: 377-385
25EEMarcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: RTL-Based Functional Test Generation for High Defects Coverage in Digital Systems. J. Electronic Testing 17(3-4): 311-319 (2001)
2000
24 Octávio Páscoa Dias, Isabel C. Teixeira, João Paulo Teixeira, Leandro Buss Becker, Carlos Eduardo Pereira: Optimizing Functional distribution in Complex System Design. DIPES 2000: 75-86
23EELeandro Buss Becker, Carlos Eduardo Pereira, Octávio Páscoa Dias, Isabel C. Teixeira, João Paulo Teixeira: MOSYS A Methodology for Automatic Object Identification from System Specification. ISORC 2000: 198-201
22EEOctávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Quality of Electronic Design: From Architectural Level to Test Coverage. ISQED 2000: 197-
1999
21EEMarcelino B. Santos, João Paulo Teixeira: Defect-Oriented Mixed-Level Fault Simulation of Digital Systems-on-a-Chip Using HDL. DATE 1999: 549-
20EEFernando M. Gonçalves, João Paulo Teixeira: Teaching Microelectronic-Based Integrated Systems Design and Test. MSE 1999: 65-66
19EEMarcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Defect-Oriented Verilog Fault Simulation of SoC Macros using a Stratified Fault Sampling Technique. VTS 1999: 326-332
18EEOctávio Páscoa Dias, Isabel C. Teixeira, João Paulo Teixeira: Metrics and Criteria for Quality Assessment of Testable Hw/Sw Systems Architectures. J. Electronic Testing 14(1-2): 149-158 (1999)
17EEFernando M. Gonçalves, João Paulo Teixeira: Defect-Oriented Sampling of Non-Equally Probable Faults in VLSI Systems. J. Electronic Testing 15(1-2): 41-52 (1999)
1998
16 Octávio Páscoa Dias, Isabel C. Teixeira, João Paulo Teixeira, Carlos Eduardo Pereira: An OO Based Methodology for Real-Time HW/SW Systems Modeling. DIPES 1998: 213-222
15EEFernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Defect-oriented test quality assessment using fault sampling and simulation. ITC 1998: 35-42
14EEFernando M. Gonçalves, João Paulo Teixeira: Sampling Techniques of Non-Equally Probable Faults in VLSI System. VTS 1998: 283-288
1997
13EEFernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Realistic Fault Extraction for High-Quality Design and Test of VLSI Systems. DFT 1997: 29-37
1996
12 F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos, João Paulo Teixeira: Defect-Oriented IC Test and Diagnosis Using VHDL Fault Simulation. ITC 1996: 620-628
11EEJosé T. de Sousa, Fernando M. Gonçalves, João Paulo Teixeira, Cristoforo Marzocca, Francesco Corsi, Thomas W. Williams: Defect level evaluation in an IC design environment. IEEE Trans. on CAD of Integrated Circuits and Systems 15(10): 1286-1293 (1996)
1995
10EEMarcelino B. Santos, M. Simões, Isabel C. Teixeira, João Paulo Teixeira: Test preparation for high coverage of physical defects in CMOS digital ICs. VTS 1995: 330-337
1994
9 Antonio Casimiro, F. Conçalves, João Paulo Teixeira, Marcelino B. Santos: On the Analysis of Routing Cells and Adjacency Faults in CMOS Digital Circuits. DFT 1994: 263-270
8 José T. de Sousa, Fernando M. Gonçalves, João Paulo Teixeira, Thomas W. Williams: Fault Modeling and Defect Level Projections in Digital ICs. EDAC-ETC-EUROASIC 1994: 436-442
7 M. Calha, Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Back Annotation of Physical Defects into Gate-Level, Realistic Faults in Digital ICs. ITC 1994: 720-728
1993
6 Antonio Casimiro, M. Simões, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Experiments on Bridging Fault Analysis and Layout-Level DFT for CMOS Designs. DFT 1993: 109-116
5 P. Nicolau, J. Barbosa, M. Saraiva, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Realistic Fault Analysis of CMOS Analog Building Blocks. DFT 1993: 311-318
1992
4 M. Saraiva, P. Casimiro, Marcelino B. Santos, José T. de Sousa, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Physical DFT for High Coverage of Realistic Faults. ITC 1992: 642-651
1991
3 José T. de Sousa, Fernando M. Gonçalves, João Paulo Teixeira: IC Defects-Based Testability Analysis. ITC 1991: 500-509
2EEJoão Paulo Teixeira, Isabel C. Teixeira, C. F. Beltrá Almeida, Fernando M. Gonçalves, J. Gonçalves: A methodology for testability enhancement at layout level. J. Electronic Testing 1(4): 287-299 (1991)
1990
1EEJoão Paulo Teixeira, Isabel C. Teixeira, C. F. Beltrá Almeida, Fernando M. Gonçalves, J. Gonçalves, R. Crespo: A strategy for testability enhancement at layout level. EURO-DAC 1990: 413-417

Coauthor Index

1C. F. Beltrá Almeida [1] [2]
2L. Balado [40]
3J. Barbosa [5]
4Maria João Barros [32]
5Daniel Barros Jr. [42]
6Leandro Buss Becker [23] [24]
7P. Bento [46]
8Daniela Braga [32] [35]
9M. Calha [7]
10Antonio Casimiro [6] [9]
11P. Casimiro [4]
12F. Celeiro [12]
13F. Conçalves [9]
14Francesco Corsi [11]
15R. Crespo [1]
16L. Dias [12]
17Octávio Páscoa Dias [16] [18] [22] [23] [24] [29]
18José M. Fernandes [39]
19Helder Ferreira [32]
20J. Ferreira [12]
21Joan Figueras [33] [40]
22J. Freijedo [49] [50] [52]
23Diamantino Freitas [32] [35] [36]
24Fernando M. Gonçalves [1] [2] [3] [4] [7] [8] [11] [13] [14] [15] [17] [19] [20] [25] [26] [27] [30] [31] [34] [37]
25J. Gonçalves [1] [2]
26Paulo Gouveia [32]
27F. Guerreiro [48]
28D. Barros Júnior [44]
29Vagner Latsch [32]
30C. Leong [46]
31Hugo Lérias [28]
32P. Lousã [46]
33João Luz [28]
34Salvador Manich [33] [40]
35Aldina Marques [35]
36Cristoforo Marzocca [11]
37Ana Mendes [28]
38António Moura [32]
39Pedro Moura [28]
40Peter Muhmenthaler [29]
41P. Nicolau [5]
42J. Nobre [46]
43A. Pantelimon [38]
44A. Parreira [38] [41] [43]
45Carlos Eduardo Pereira [16] [23] [24] [29]
46A. Pierce [48]
47Paolo Prinetto [29]
48W. Radermacher [29]
49J. Rego [46]
50P. Rodrigues [46]
51Juan J. Rodríguez-Andina [45] [47] [49] [50] [51] [52] [53]
52M. Rodríguez-Irago [44] [45] [47]
53Rosa Rodríguez-Montañés [33]
54Marcelino B. Santos [4] [5] [6] [7] [9] [10] [12] [15] [19] [21] [22] [25] [26] [27] [30] [31] [33] [34] [37] [38] [39] [40] [41] [42] [43] [44] [45] [48] [49] [50] [52] [53]
55Marcelino Bicho Dos Santos [51]
56M. Saraiva [4] [5]
57Jorge Semião [22] [29] [47] [48] [49] [50] [51] [52] [53]
58J. C. Silva [46]
59M. Simões [6] [10]
60José T. de Sousa [3] [4] [8] [11] [38]
61Isabel C. Teixeira [1] [2] [4] [5] [6] [7] [10] [13] [15] [16] [18] [19] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [33] [34] [37] [39] [40] [42] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53]
62A. Trindade [46]
63J. Varela [46]
64Fabian Vargas [42] [44] [45] [47] [49] [50] [51] [52] [53]
65Thomas W. Williams [8] [11]
66Yervant Zorian [29]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)