| 2008 |
|---|
| 31 | EE | Uranmandakh Amgalan,
Christian Hachmann,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Signature Rollback - A Technique for Testing Robust Circuits.
VTS 2008: 125-130 |
| 2007 |
|---|
| 30 | | Philipp Öhler,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair.
DDECS 2007: 185-190 |
| 29 | EE | Sybille Hellebrand,
Christian G. Zoellin,
Hans-Joachim Wunderlich,
Stefan Ludwig,
Torsten Coym,
Bernd Straube:
A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction.
DFT 2007: 50-58 |
| 28 | EE | Philipp Öhler,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.
European Test Symposium 2007: 91-96 |
| 2006 |
|---|
| 27 | EE | Bernd Becker,
Ilia Polian,
Sybille Hellebrand,
Bernd Straube,
Hans-Joachim Wunderlich:
DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems).
it - Information Technology 48(5): 304- (2006) |
| 2004 |
|---|
| 26 | EE | Armin Würtenberger,
Christofer S. Tautermann,
Sybille Hellebrand:
Data Compression for Multiple Scan Chains Using Dictionaries with Corrections.
ITC 2004: 926-935 |
| 2003 |
|---|
| 25 | EE | Armin Würtenberger,
Christofer S. Tautermann,
Sybille Hellebrand:
A Hybrid Coding Strategy For Optimized Test Data Compression.
ITC 2003: 451-459 |
| 2002 |
|---|
| 24 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Alexander A. Ivaniuk,
Yuri V. Klimets,
Vyacheslav N. Yarmolik:
Efficient Online and Offline Testing of Embedded DRAMs.
IEEE Trans. Computers 51(7): 801-809 (2002) |
| 23 | EE | Huaguo Liang,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
A Mixed-Mode BIST Scheme Based on Folding Compression.
J. Comput. Sci. Technol. 17(2): 203-212 (2002) |
| 22 | EE | Huaguo Liang,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.
J. Electronic Testing 18(2): 159-170 (2002) |
| 2001 |
|---|
| 21 | | Huaguo Liang,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Two-dimensional test data compression for scan-based deterministic BIST.
ITC 2001: 894-902 |
| 20 | EE | Sybille Hellebrand,
Huaguo Liang,
Hans-Joachim Wunderlich:
A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.
J. Electronic Testing 17(3-4): 341-349 (2001) |
| 2000 |
|---|
| 19 | | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Huaguo Liang:
A mixed mode BIST scheme based on reseeding of folding counters.
ITC 2000: 778-784 |
| 1999 |
|---|
| 18 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Vyacheslav N. Yarmolik:
Symmetric Transparent BIST for RAMs.
DATE 1999: 702-707 |
| 17 | EE | Vyacheslav N. Yarmolik,
I. V. Bykov,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.
EDCC 1999: 339-350 |
| 16 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Alexander A. Ivaniuk,
Yuri V. Klimets,
Vyacheslav N. Yarmolik:
Error Detecting Refreshment for Embedded DRAMs.
VTS 1999: 384-390 |
| 1998 |
|---|
| 15 | EE | Vyacheslav N. Yarmolik,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.
DATE 1998: 173-179 |
| 14 | EE | Andre Hertwig,
Sybille Hellebrand,
Hans-Joachim Wunderlich:
Fast Self-Recovering Controllers.
VTS 1998: 296-302 |
| 13 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Andre Hertwig:
Synthesizing Fast, Online-Testable Control Units.
IEEE Design & Test of Computers 15(4): 36-41 (1998) |
| 12 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Andre Hertwig:
Mixed-Mode BIST Using Embedded Processors.
J. Electronic Testing 12(1-2): 127-138 (1998) |
| 1997 |
|---|
| 11 | EE | Kun-Han Tsai,
Sybille Hellebrand,
Janusz Rajski,
Malgorzata Marek-Sadowska:
STARBIST: Scan Autocorrelated Random Pattern Generation.
DAC 1997: 472-477 |
| 1996 |
|---|
| 10 | | Sybille Hellebrand,
Hans-Joachim Wunderlich,
Andre Hertwig:
Mixed-Mode BIST Using Embedded Processors.
ITC 1996: 195-204 |
| 1995 |
|---|
| 9 | EE | Sybille Hellebrand,
Birgit Reeb,
Steffen Tarnick,
Hans-Joachim Wunderlich:
Pattern generation for a deterministic BIST scheme.
ICCAD 1995: 88-94 |
| 8 | | Sybille Hellebrand,
Janusz Rajski,
Steffen Tarnick,
Srikanth Venkataraman,
Bernard Courtois:
Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.
IEEE Trans. Computers 44(2): 223-233 (1995) |
| 1994 |
|---|
| 7 | | Sybille Hellebrand,
Hans-Joachim Wunderlich:
Synthesis of Self-Testable Controllers.
EDAC-ETC-EUROASIC 1994: 580-585 |
| 6 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich:
An efficient procedure for the synthesis of fast self-testable controller structures.
ICCAD 1994: 110-116 |
| 1992 |
|---|
| 5 | | Sybille Hellebrand,
Steffen Tarnick,
Bernard Courtois,
Janusz Rajski:
Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers.
ITC 1992: 120-129 |
| 4 | EE | Hans-Joachim Wunderlich,
Sybille Hellebrand:
The pseudoexhaustive test of sequential circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(1): 26-33 (1992) |
| 1990 |
|---|
| 3 | EE | Sybille Hellebrand,
Hans-Joachim Wunderlich:
Tools and devices supporting the pseudo-exhaustive test.
EURO-DAC 1990: 13-17 |
| 1989 |
|---|
| 2 | | Sybille Hellebrand,
Hans-Joachim Wunderlich:
The Pseudo-Exhaustive Test of Sequential Circuits.
ITC 1989: 19-27 |
| 1988 |
|---|
| 1 | | Sybille Hellebrand,
Hans-Joachim Wunderlich:
Automatisierung des Entwurfs vollständig testbarer Schaltungen.
GI Jahrestagung (2) 1988: 145-159 |
