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19. VLSI Design 2006: Hyderabad, India

19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India. IEEE Computer Society 2006, ISBN 0-7695-2502-4 BibTeX



Inaugural Keynote Address


Banquet Speeches

Plenary Sessions

Session 1A: Analog and Mixed-Signal Design I

Session 1B: VLSI Technology I

Session 1C: Interconnect Design I

Session 1D: Test and Diagnosis

Session 2A: Communications Module Architecture

Session 2B: Formal Verification

Session 2C: VLSI Architecture and FPGAs

Session 2D: Crosstalk Analysis

Session 3A: High-Level and Logic Synthesis

Session 3B: Distribution and Noise Modeling

Session 3C: Multimedia and Arithmetic Architecture

Session 3D: Test Algorithms

Panel: VC Forum

Special Session: Emerging Technologies

Session 4A: Synthesis and Partitioning

Session 4B: Memory and Logic Design

Session 4C: Communications and Multimedia Architecture I

Session 4D: VLSI Technology II

Session 5A: Analog and Mixed-Signal Design II

Session 5B: Low Power/RF Design

Session 5C: Embedded Systems

Session 5D: Design Tools

Special Session : Emerging Technologies

Session 6A: Analog Design/MEMS

Session 6B: Low Power Design I

Session 6C: Interconnect Design II

Session 6D: Test and Design-for-Testability

Copyright © Sat May 16 23:46:44 2009 by Michael Ley (ley@uni-trier.de)