Wu-Tung Cheng

2008
44	EE	Elif Alpaslan, Yu Huang, Xijiang Lin, Wu-Tung Cheng, Jennifer Dworak: Reducing Scan Shift Power at RTL. VTS 2008: 139-146
43	EE	Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng: Automatic Test Pattern Generation for Interconnect Open Defects. VTS 2008: 181-186
42	EE	Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Neelanjan Mukherjee, Mark Kassab: X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 147-159 (2008)
2007
41	EE	Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy, Huaxing Tang: Speeding Up Effect-Cause Defect Diagnosis Using a Small Dictionary. VTS 2007: 225-230
40	EE	Jerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai: X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis. IEEE Design & Test of Computers 24(5): 476-485 (2007)
2006
39	EE	Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy, Huaxing Tang: On Methods to Improve Location Based Logic Diagnosis. VLSI Design 2006: 181-187
2005
38	EE	Yu Huang, Wu-Tung Cheng, Greg Crowell: Using fault model relaxation to diagnose real scan chain defects. ASP-DAC 2005: 1176-1179
37	EE	Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy: Bridge Defect Diagnosis with Physical Information. Asian Test Symposium 2005: 248-253
36	EE	Jay Jahangiri, Nilanjan Mukherjee, Wu-Tung Cheng, Subramanian Mahadevan, Ron Press: Achieving High Test Quality with Reduced Pin Count Testing. Asian Test Symposium 2005: 312-317
35	EE	Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng: Hardware Ef.cient LBISTWith Complementary Weights. ICCD 2005: 479-484
2004
34	EE	Wu-Tung Cheng, Kun-Han Tsai, Yu Huang, Nagesh Tamarapalli, Janusz Rajski: Compactor Independent Direct Diagnosis. Asian Test Symposium 2004: 204-209
33	EE	Yu Huang, Wu-Tung Cheng, Cheng-Ju Hsieh, Huan-Yung Tseng, Alou Huang, Yu-Ting Hung: Intermittent Scan Chain Fault Diagnosis Based on Signal Probability Analysis. DATE 2004: 1072-1077
32	EE	Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng: Logic BIST with Scan Chain Segmentation. ITC 2004: 57-66
31	EE	Xiaogang Du, Sudhakar M. Reddy, Wu-Tung Cheng, Joseph Rayhawk, Nilanjan Mukherjee: At-Speed Built-in Self-Repair Analyzer for Embedded Word-Oriented Memories. VLSI Design 2004: 895-900
30	EE	Liyang Lai, Thomas Rinderknecht, Wu-Tung Cheng, Janak H. Patel: Logic BIST Using Constrained Scan Cells. VTS 2004: 199-205
29	EE	Xiaogang Du, Sudhakar M. Reddy, Don E. Ross, Wu-Tung Cheng, Joseph Rayhawk: Memory BIST Using ESP. VTS 2004: 243-248
2003
28	EE	Xiaogang Du, Sudhakar M. Reddy, Joseph Rayhawk, Wu-Tung Cheng: Testing Delay Faults in Embedded CAMs. Asian Test Symposium 2003: 378-383
27	EE	Yu Huang, Wu-Tung Cheng, Cheng-Ju Hsieh, Huan-Yung Tseng, Alou Huang, Yu-Ting Hung: Efficient Diagnosis for Multiple Intermittent Scan Chain Hold-Time Faults. Asian Test Symposium 2003: 44-49
26	EE	Yu Huang, Wu-Tung Cheng: Using embedded infrastructure IP for SOC post-silicon verification. DAC 2003: 674-677
25	EE	Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Sudhakar M. Reddy: Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets. ISQED 2003: 99-104
24	EE	Wu-Tung Cheng: Silicon Diagnosis. ITC 2003: 1305
23	EE	Yu Huang, Wu-Tung Cheng, Sudhakar M. Reddy, Cheng-Ju Hsieh, Yu-Ting Hung: Statistical Diagnosis for Intermittent Scan Chain Hold-Time Fault. ITC 2003: 319-328
22	EE	Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai: BIST for Deep Submicron ASIC Memories with High Performance Application. ITC 2003: 386-392
2002
21	EE	Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng: Core - Clustering Based SOC Test Scheduling Optimization. Asian Test Symposium 2002: 405-410
20	EE	Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan: Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm. ITC 2002: 74-82
19	EE	Yu Huang, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng, Sudhakar M. Reddy: Constraint Driven Pin Mapping for Concurrent SOC Testing. VLSI Design 2002: 511-516
18	EE	Yu Huang, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Wu-Tung Cheng, Sudhakar M. Reddy: Synthesis of Scan Chains for Netlist Descriptions at RT-Level. J. Electronic Testing 18(2): 189-201 (2002)
17	EE	Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy: On Concurrent Test of Core-Based SOC Design. J. Electronic Testing 18(4-5): 401-414 (2002)
2001
16	EE	Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy: Resource Allocation and Test Scheduling for Concurrent Test of Core-Based SoC D. Asian Test Symposium 2001: 265-
15		Yu Huang, Chien-Chung Tsai, Neelanjan Mukherjee, Omer Samman, Dan Devries, Wu-Tung Cheng, Sudhakar M. Reddy: On RTL scan design. ITC 2001: 728-737
2000
14	EE	Wu-Tung Cheng: Current status and future trend on CAD tools for VLSI testing Wu-Tung Cheng. Asian Test Symposium 2000: 10-
13	EE	Xijiang Lin, Wu-Tung Cheng, Irith Pomeranz, Sudhakar M. Reddy: SIFAR: Static Test Compaction for Synchronous Sequential Circuits Based on Single Fault Restoration. VTS 2000: 205-212
1999
12		Wu-Tung Cheng: High time for high level ATPG. ITC 1999: 1113
1996
11		Bejoy G. Oomman, Wu-Tung Cheng, John A. Waicukauski: A Universal Technique for Accelerating Simulation of Scan Test Patterns. ITC 1996: 135-141
1992
10	EE	Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel: PROOFS: a fast, memory-efficient sequential circuit fault simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 198-207 (1992)
9	EE	Wu-Tung Cheng, James L. Lewandowski, Eleanor Wu: Optimal diagnostic methods for wiring interconnects. IEEE Trans. on CAD of Integrated Circuits and Systems 11(9): 1161-1166 (1992)
1990
8	EE	Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel: Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator. DAC 1990: 535-540
7	EE	Wu-Tung Cheng, Janak H. Patel: PROOFS: a super fast fault simulator for sequential circuits. EURO-DAC 1990: 475-479
6	EE	Wu-Tung Cheng, Meng-Lin Yu: Differential fault simulation for sequential circuits. J. Electronic Testing 1(1): 7-13 (1990)
1989
5	EE	Wu-Tung Cheng, Meng-Lin Yu: Differential Fault Simulation - a Fast Method Using Minimal Memory. DAC 1989: 424-428
4		Wu-Tung Cheng, Tapan J. Chakraborty: Gentest: An Automatic Test-Generation System for Sequential Circuits. IEEE Computer 22(4): 43-49 (1989)
1988
3	EE	Wu-Tung Cheng: Split Circuit Model for Test Generation. DAC 1988: 96-101
1987
2		Wu-Tung Cheng, Janak H. Patel: A Minimum Test Set for Multiple Fault Detection in Ripple Carry Adders. IEEE Trans. Computers 36(7): 891-895 (1987)
1985
1		Wu-Tung Cheng, Janak H. Patel: Multiple-Fault Detection in Iterative Logic Arrays. ITC 1985: 493-499

Coauthor Index

1	Elif Alpaslan	[44]
2	Bernd Becker	[43]
3	Tapan J. Chakraborty	[4]
4	Greg Crowell	[38]
5	Dan Devries	[15]
6	Xiaogang Du	[28] [29] [31]
7	Jennifer Dworak	[44]
8	Piet Engelke	[43]
9	Cheng-Ju Hsieh	[23] [27] [33]
10	Alou Huang	[27] [33]
11	Yu Huang	[15] [16] [17] [18] [19] [20] [21] [23] [25] [26] [27] [33] [34] [38] [44]
12	Yu-Ting Hung	[23] [27] [33]
13	Jay Jahangiri	[36]
14	Mark Kassab	[40] [42]
15	Martin Keim	[43]
16	Liyang Lai	[30] [32] [35] [40]
17	Sherry Lai	[22]
18	James L. Lewandowski	[9]
19	Xijiang Lin	[13] [44]
20	Subramanian Mahadevan	[36]
21	Grzegorz Mrugalski	[40] [42]
22	Neelanjan Mukherjee	[15] [42]
23	Nilanjan Mukherjee	[16] [17] [18] [19] [20] [25] [31] [36] [40]
24	Thomas M. Niermann	[8] [10]
25	Bejoy G. Oomman	[11]
26	Janak H. Patel	[1] [2] [7] [8] [10] [30] [32] [35]
27	Ilia Polian	[43]
28	Paul Policke	[22]
29	Irith Pomeranz	[13]
30	Theo J. Powell	[22]
31	Ron Press	[36]
32	Janusz Rajski	[34] [40] [42]
33	Joseph Rayhawk	[22] [28] [29] [31]
34	Sudhakar M. Reddy	[13] [15] [16] [17] [18] [19] [20] [21] [23] [25] [28] [29] [31] [37] [39] [41]
35	Paul Reuter	[20]
36	Thomas Rinderknecht	[30] [32] [35]
37	Don E. Ross	[29]
38	Omer Samman	[15] [16] [17] [18] [19] [20] [22]
39	Manish Sharma	[40]
40	Stefan Spinner	[43]
41	Nagesh Tamarapalli	[34]
42	Huaxing Tang	[39] [41]
43	Chien-Chung Tsai	[15] [16] [17] [18] [19] [20] [25]
44	Kun-Han Tsai	[34]
45	Huan-Yung Tseng	[27] [33]
46	Jerzy Tyszer	[40] [42]
47	John A. Waicukauski	[11]
48	Eleanor Wu	[9]
49	Meng-Lin Yu	[5] [6]
50	Yahya Zaidan	[16] [17] [19] [20]
51	Yanping Zhang	[19]
52	Wei Zou	[37] [39] [41]

Colors in the list of coauthors