| 2008 |
|---|
| 9 | EE | Muhammad Ibrahim,
Ahsan Raja Chowdhury,
Hafiz Md. Hasan Babu:
Minimization of CTS of k-CNOT Circuits for SSF and MSF Model.
DFT 2008: 290-298 |
| 8 | EE | Ashis Kumer Biswas,
Md. Mahmudul Hasan,
Moshaddek Hasan,
Ahsan Raja Chowdhury,
Hafiz Md. Hasan Babu:
A Novel Approach to Design BCD Adder and Carry Skip BCD Adder.
VLSI Design 2008: 566-571 |
| 2006 |
|---|
| 7 | | Amin Ahsan Ali,
Hafiz Md. Hasan Babu,
Ahsan Raja Chowdhury:
Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates.
CDES 2006: 101-106 |
| 6 | EE | Ahsan Raja Chowdhury,
Rumana Nazmul,
Hafiz Md. Hasan Babu:
A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array.
VLSI Design 2006: 311-316 |
| 5 | EE | Hafiz Md. Hasan Babu,
Ahsan Raja Chowdhury:
Design of a compact reversible binary coded decimal adder circuit.
Journal of Systems Architecture 52(5): 272-282 (2006) |
| 2005 |
|---|
| 4 | EE | Hafiz Md. Hasan Babu,
Ahsan Raja Chowdhury:
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder.
VLSI Design 2005: 255-260 |
| 2004 |
|---|
| 3 | | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Rumana Nazmul,
Md. Anwarul Haque,
Ahsan Raja Chowdhury:
A heuristic approach to synthesize Boolean functions using TANT network.
ISCAS (2) 2004: 373-376 |
| 2 | EE | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Syed Mostahed Ali Chowdhury,
Ahsan Raja Chowdhury:
Synthesis of Full-Adder Circuit Using Reversible Logic.
VLSI Design 2004: 757-760 |
| 2003 |
|---|
| 1 | EE | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Ahsan Raja Chowdhury,
Syed Mostahed Ali Chowdhury:
Reversible Logic Synthesis for Minimization of Full-Adder Circuit.
DSD 2003: 50-54 |
