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Sanjoy Kumar Dey

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2008
3EESantanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee: An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture. ISCAS 2008: 149-152
2006
2EESanjoy Kumar Dey, Swapna Banerjee: An 8-Bit, 3.8GHz Dynamic BiCMOS Comparator for High-Performance ADC. VLSI Design 2006: 593-598
2005
1EESamiran Halder, Swapna Banerjee, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Sanjoy Kumar Dey: A 10-Bit 80-MSPS 2.5-V 27.65-mW 0.185-mm2 Segmented Current Steering CMOS DAC. VLSI Design 2005: 319-322

Coauthor Index

1Swapna Banerjee [1] [2] [3]
2Vinay Belde [3]
3Anirban Chatterjee [1]
4Arindrajit Ghosh [1]
5Samiran Halder [1]
6Ravi Sankar Prasad [1] [3]
7Santanu Sarkar [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)