2008 |
62 | EE | Yun Liang,
Lei Ju,
Samarjit Chakraborty,
Tulika Mitra,
Abhik Roychoudhury:
Cache-aware optimization of BAN applications.
CODES+ISSS 2008: 149-154 |
61 | EE | Lei Ju,
Bach Khoa Huynh,
Abhik Roychoudhury,
Samarjit Chakraborty:
Performance debugging of Esterel specifications.
CODES+ISSS 2008: 173-178 |
60 | EE | Vivy Suhendra,
Abhik Roychoudhury,
Tulika Mitra:
Scratchpad allocation for concurrent embedded software.
CODES+ISSS 2008: 37-42 |
59 | EE | Lei Ju,
Abhik Roychoudhury,
Samarjit Chakraborty:
Schedulability Analysis of MSC-based System Models.
IEEE Real-Time and Embedded Technology and Applications Symposium 2008: 215-224 |
58 | EE | Liang Guo,
Abhik Roychoudhury:
Debugging Statecharts Via Model-Code Traceability.
ISoLA 2008: 292-306 |
57 | EE | Arnab De,
Abhik Roychoudhury,
Deepak D'Souza:
Java memory model aware software validation.
PASTE 2008: 8-14 |
56 | EE | Tao Wang,
Abhik Roychoudhury:
Dynamic slicing on Java bytecode traces.
ACM Trans. Program. Lang. Syst. 30(2): (2008) |
2007 |
55 | EE | Xianfeng Li,
Abhik Roychoudhury,
Tulika Mitra,
Prabhat Mishra,
Xu Cheng:
A Retargetable Software Timing Analyzer Using Architecture Description Language.
ASP-DAC 2007: 396-401 |
54 | EE | Lei Ju,
Samarjit Chakraborty,
Abhik Roychoudhury:
Accounting for cache-related preemption delay in dynamic priority schedulability analysis.
DATE 2007: 1623-1628 |
53 | EE | Samarjit Chakraborty,
Tulika Mitra,
Abhik Roychoudhury,
Lothar Thiele,
Unmesh D. Bordoloi,
Cem Derdiyok:
Cache-Aware Timing Analysis of Streaming Applications.
ECRTS 2007: 159-168 |
52 | EE | Abhik Roychoudhury,
Ankit Goel,
Bikram Sengupta:
Symbolic message sequence charts.
ESEC/SIGSOFT FSE 2007: 275-284 |
51 | EE | Tao Wang,
Abhik Roychoudhury:
Hierarchical dynamic slicing.
ISSTA 2007: 228-238 |
50 | EE | Samarjit Chakraborty,
Abhik Roychoudhury:
Tutorial T8B: Performance Debugging of Complex Embedded Systems.
VLSI Design 2007: 13 |
49 | EE | Liang Yun,
Abhik Roychoudhury,
Tulika Mitra:
Timing Analysis of Body Area Network Applications.
WCET 2007 |
48 | EE | Thuan Quang Huynh,
Abhik Roychoudhury:
Memory model sensitive bytecode verification.
Formal Methods in System Design 31(3): 281-305 (2007) |
47 | EE | Xianfeng Li,
Liang Yun,
Tulika Mitra,
Abhik Roychoudhury:
Chronos: A timing analyzer for embedded software.
Sci. Comput. Program. 69(1-3): 56-67 (2007) |
2006 |
46 | EE | Liang Guo,
Abhik Roychoudhury,
Tao Wang:
Accurately Choosing Execution Runs for Software Fault Localization.
CC 2006: 80-95 |
45 | EE | Vivy Suhendra,
Tulika Mitra,
Abhik Roychoudhury,
Ting Chen:
Efficient detection and exploitation of infeasible paths for software timing analysis.
DAC 2006: 358-363 |
44 | EE | Thuan Quang Huynh,
Abhik Roychoudhury:
A Memory Model Sensitive Checker for C#.
FM 2006: 476-491 |
43 | EE | Ankit Goel,
Sun Meng,
Abhik Roychoudhury,
P. S. Thiagarajan:
Interacting process classes.
ICSE 2006: 302-311 |
42 | EE | Biman Chakraborty,
Ting Chen,
Tulika Mitra,
Abhik Roychoudhury:
Handling Constraints in Multi-Objective GA for Embedded System Design.
VLSI Design 2006: 305-310 |
41 | EE | Supratik Mukhopadhyay,
Abhik Roychoudhury,
Zijiang Yang:
Preface.
Electr. Notes Theor. Comput. Sci. 157(1): 1 (2006) |
40 | EE | Xianfeng Li,
Abhik Roychoudhury,
Tulika Mitra:
Modeling out-of-order processors for WCET analysis.
Real-Time Systems 34(3): 195-227 (2006) |
2005 |
39 | EE | Tao Wang,
Abhik Roychoudhury:
Automated path generation for software fault localization.
ASE 2005: 347-351 |
38 | EE | Abhik Roychoudhury,
Tulika Mitra,
Hemendra Singh Negi:
Analyzing Loop Paths for Execution Time Estimation.
ICDCIT 2005: 458-469 |
37 | EE | Vivy Suhendra,
Tulika Mitra,
Abhik Roychoudhury,
Ting Chen:
WCET Centric Data Allocation to Scratchpad Memory.
RTSS 2005: 223-232 |
36 | EE | Ting Chen,
Tulika Mitra,
Abhik Roychoudhury,
Vivy Suhendra:
Exploiting Branch Constraints without Exhaustive Path Enumeration.
WCET 2005 |
35 | EE | Sandro Etalle,
Supratik Mukhopadhyay,
Abhik Roychoudhury:
Preface.
Electr. Notes Theor. Comput. Sci. 118: 1- (2005) |
34 | EE | Xianfeng Li,
Tulika Mitra,
Abhik Roychoudhury:
Modeling Control Speculation for Timing Analysis.
Real-Time Systems 29(1): 27-58 (2005) |
2004 |
33 | EE | Xianfeng Li,
Hemendra Singh Negi,
Tulika Mitra,
Abhik Roychoudhury:
Design space exploration of caches using compressed traces.
ICS 2004: 116-125 |
32 | EE | Tao Wang,
Abhik Roychoudhury:
Using Compressed Bytecode Traces for Slicing Java Programs.
ICSE 2004: 512-521 |
31 | EE | Tulika Mitra,
Abhik Roychoudhury,
Qinghua Shen:
Impact of Java Memory Model on Out-of-Order Multiprocessors.
IEEE PACT 2004: 99-110 |
30 | EE | Tao Wang,
Abhik Roychoudhury,
Roland H. C. Yap,
S. C. Choudhary:
Symbolic Execution of Behavioral Requirements.
PADL 2004: 178-192 |
29 | EE | Abhik Roychoudhury,
C. R. Ramakrishnan:
Unfold/Fold Transformations for Automated Verification of Parameterized Concurrent Systems.
Program Development in Computational Logic 2004: 261-290 |
28 | EE | Abhik Roychoudhury,
P. S. Thiagarajan,
Tuan-Anh Tran,
Vera A. Zvereva:
Automatic Generation of Protocol Converters from Scenario-Based Specifications.
RTSS 2004: 447-458 |
27 | EE | Xianfeng Li,
Abhik Roychoudhury,
Tulika Mitra:
Modeling Out-of-Order Processors for Software Timing Analysis.
RTSS 2004: 92-103 |
26 | EE | Abhik Roychoudhury,
K. Narayan Kumar,
C. R. Ramakrishnan,
I. V. Ramakrishnan:
An unfold/fold transformation framework for definite logic programs.
ACM Trans. Program. Lang. Syst. 26(3): 464-509 (2004) |
25 | EE | Abhik Roychoudhury,
I. V. Ramakrishnan:
Inductively Verifying Invariant Properties of Parameterized Systems.
Autom. Softw. Eng. 11(2): 101-139 (2004) |
2003 |
24 | EE | Abhik Roychoudhury,
P. S. Thiagarajan:
Communicating Transaction Processes.
ACSD 2003: 157-166 |
23 | EE | Abhik Roychoudhury:
Depiction and Playout of Multi-threaded Program Executions.
ASE 2003: 331-336 |
22 | EE | Hemendra Singh Negi,
Tulika Mitra,
Abhik Roychoudhury:
Accurate estimation of cache-related preemption delay.
CODES+ISSS 2003: 201-206 |
21 | EE | Xianfeng Li,
Tulika Mitra,
Abhik Roychoudhury:
Accurate timing analysis by modeling caches, speculation and their interaction.
DAC 2003: 466-471 |
20 | EE | Abhik Roychoudhury,
Tulika Mitra,
S. R. Karri:
Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol.
DATE 2003: 10828-10833 |
19 | EE | Abhik Roychoudhury,
P. S. Thiagarajan:
Communicating Transaction Processes: An MSC-Based Model of Computation for Reactive Embedded Systems.
Lectures on Concurrency and Petri Nets 2003: 789-818 |
18 | EE | Ankit Goel,
Abhik Roychoudhury,
Tulika Mitra:
Compactly representing parallel program executions.
PPOPP 2003: 191-202 |
2002 |
17 | EE | Abhik Roychoudhury,
P. S. Thiagarajan:
An Executable Specification Language Based on Message Sequence Charts.
10th Anniversary Colloquium of UNU/IIST 2002: 226-241 |
16 | EE | Abhik Roychoudhury:
Formal Reasoning about Hardware and Software Memory Models.
ICFEM 2002: 423-434 |
15 | EE | Abhik Roychoudhury,
Tulika Mitra:
Specifying multithreaded Java semantics for program verification.
ICSE 2002: 489-499 |
14 | EE | Abhik Roychoudhury,
Xianfeng Li,
Tulika Mitra:
Timing Analysis of Embedded Software for Speculative Processors.
ISSS 2002: 126-131 |
13 | EE | Abhik Roychoudhury,
K. Narayan Kumar,
C. R. Ramakrishnan,
I. V. Ramakrishnan:
Beyond Tamaki-Sato Style Unfold/Fold Transformations for Normal Logic Programs.
Int. J. Found. Comput. Sci. 13(3): 387-403 (2002) |
2001 |
12 | EE | Abhik Roychoudhury,
I. V. Ramakrishnan:
Automated Inductive Verification of Parameterized Protocols.
CAV 2001: 25-37 |
2000 |
11 | | C. R. Ramakrishnan,
I. V. Ramakrishnan,
Scott A. Smolka,
Yifei Dong,
Xiaoqun Du,
Abhik Roychoudhury,
V. N. Venkatakrishnan:
XMC: A Logic-Programming-Based Verification Toolset.
CAV 2000: 576-580 |
10 | EE | Abhik Roychoudhury,
C. R. Ramakrishnan,
I. V. Ramakrishnan:
Justifying proofs using memo tables.
PPDP 2000: 178-189 |
9 | EE | Abhik Roychoudhury,
K. Narayan Kumar,
C. R. Ramakrishnan,
I. V. Ramakrishnan,
Scott A. Smolka:
Verification of Parameterized Systems Using Logic Program Transformations.
TACAS 2000: 172-187 |
1999 |
8 | EE | Abhik Roychoudhury,
K. Narayan Kumar,
C. R. Ramakrishnan,
I. V. Ramakrishnan:
Beyond Tamaki-Sato Style Unfold/Fold Transformations for Normal Logic Programs.
ASIAN 1999: 322-333 |
7 | EE | Amy P. Felty,
Douglas J. Howe,
Abhik Roychoudhury:
Formal Metatheory using Implicit Syntax, and an Application to Data Abstraction for Asynchronous Systems.
CADE 1999: 237-251 |
6 | | Abhik Roychoudhury,
K. Narayan Kumar,
I. V. Ramakrishnan:
Generalized Unfold/fold Transformation Systems for Normal Logic Programs.
ICLP 1999: 616 |
5 | | Abhik Roychoudhury,
K. Narayan Kumar,
C. R. Ramakrishnan,
I. V. Ramakrishnan:
A Parameterized Unfold/Fold Transformation Framework for Definite Logic Programs.
PPDP 1999: 396-413 |
1998 |
4 | EE | Abhik Roychoudhury,
C. R. Ramakrishnan,
I. V. Ramakrishnan,
R. C. Sekar:
A Conservative Technique to Improve Deterministic Evaluation of Logic Programs.
ICCL 1998: 196-205 |
3 | EE | Baoqiu Cui,
Yifei Dong,
Xiaoqun Du,
K. Narayan Kumar,
C. R. Ramakrishnan,
I. V. Ramakrishnan,
Abhik Roychoudhury,
Scott A. Smolka,
David Scott Warren:
Logic Programming and Model Checking.
PLILP/ALP 1998: 1-20 |
2 | EE | Abhik Roychoudhury,
C. R. Ramakrishnan,
I. V. Ramakrishnan,
Scott A. Smolka:
Tabulation-based Induction Proofs with Application to Automated Verification.
TAPD 1998: 83-88 |
1995 |
1 | | Abhik Roychoudhury,
Susmita Sur-Kolay:
Efficient Algorithms for Vertex Arboricity of Planar Graphs.
FSTTCS 1995: 37-51 |