2009 |
27 | EE | V. Siva Sankar,
H. Narayanan,
Sachin B. Patkar:
Exploiting Hybrid Analysis in Solving Electrical Networks.
VLSI Design 2009: 206-211 |
26 | EE | Vinay B. Y. Kumar,
Siddharth Joshi,
Sachin B. Patkar,
H. Narayanan:
FPGA Based High Performance Double-Precision Matrix Multiplication.
VLSI Design 2009: 341-346 |
2007 |
25 | EE | Gaurav Trivedi,
H. Narayanan:
Application of Fast DC Analysis to Partitioning Hypergraphs.
ISCAS 2007: 3407-3410 |
24 | EE | Gaurav Trivedi,
Madhav P. Desai,
H. Narayanan:
Parallelization of DC Analysis through Multiport Decomposition.
VLSI Design 2007: 863-868 |
23 | EE | Gaurav Trivedi,
Sumit Punglia,
H. Narayanan:
Application of DC Analyzer to Combinatorial Optimization Problems.
VLSI Design 2007: 869-874 |
2006 |
22 | EE | Gaurav Trivedi,
Madhav P. Desai,
H. Narayanan:
Fast DC Analysis and Its Application to Combinatorial Optimization Problems.
VLSI Design 2006: 695-700 |
2003 |
21 | EE | Sachin B. Patkar,
H. Narayanan:
An Efficient Practical Heuristic For Good Ratio-Cut Partitioning.
VLSI Design 2003: 64-69 |
20 | EE | Madhav P. Desai,
H. Narayanan,
Sachin B. Patkar:
The realization of finite state machines by decomposition and the principal lattice of partitions of a submodular function.
Discrete Applied Mathematics 131(2): 299-310 (2003) |
19 | EE | H. Narayanan:
A note on the minimization of symmetric and general submodular functions.
Discrete Applied Mathematics 131(2): 513-522 (2003) |
18 | EE | Sachin B. Patkar,
H. Narayanan:
Improving graph partitions using submodular functions.
Discrete Applied Mathematics 131(2): 535-553 (2003) |
17 | EE | Sachin B. Patkar,
H. Narayanan:
Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and its Connections with Principal Partition.
J. Comb. Optim. 7(1): 45-68 (2003) |
2002 |
16 | EE | M. V. Atre,
P. S. Subramanian,
H. Narayanan:
Mathematical Methods in VLSI (Tutorial Abstract).
VLSI Design 2002: 18-19 |
2001 |
15 | EE | Shabbir H. Batterywala,
H. Narayanan:
Spectral Algorithm To Compute And Synthesize Reduced Order Passive Models For Arbitrary Rc Multiports.
VLSI Design 2001: 500- |
14 | EE | Sachin B. Patkar,
H. Narayanan:
A note on optimal covering augmentation for graphic polymatroids.
Inf. Process. Lett. 79(6): 285-290 (2001) |
2000 |
13 | EE | Sachin B. Patkar,
H. Narayanan:
Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and Its Connections with Principal Partition.
FSTTCS 2000: 94-105 |
1999 |
12 | EE | Rupesh S. Shelar,
Madhav P. Desai,
H. Narayanan:
Decomposition of Finite State Machines for Area, Delay Minimization.
ICCD 1999: 620-625 |
11 | | Shabbir H. Batterywala,
H. Narayanan:
Efficient DC Analysis of RVJ Circuits for Moment and Derivative Commutations of Interconnect Networks.
VLSI Design 1999: 169-174 |
10 | EE | B. N. V. Malleswara Gupta,
H. Narayanan,
Madhav P. Desai:
A State Assignment Scheme Targeting Performance and Area.
VLSI Design 1999: 378-383 |
1997 |
9 | EE | Sachin B. Patkar,
Shabbir H. Batterywala,
M. Chandramouli,
H. Narayanan:
A New Partitioning Strategy Based on Supermodular Functions.
VLSI Design 1997: 32-37 |
1996 |
8 | | H. Narayanan,
Subir Roy,
Sachin B. Patkar:
Approximation Algorithms for Min-k-Overlap Problems Using the Principal Lattice of Partitions Approach.
J. Algorithms 21(2): 306-330 (1996) |
1994 |
7 | | H. Narayanan,
Subir Roy,
Sachin B. Patkar:
Approximation Algorithms for Min-k-overlap Problems Using the Principal Lattice of Partitions Approach.
MFCS 1994: 525-535 |
6 | | H. Narayanan,
Huzur Saran,
Vijay V. Vazirani:
Randomized Parallel Algorithms for Matroid Union and Intersection, With Applications to Arboresences and Edge-Disjoint Spanning Trees.
SIAM J. Comput. 23(2): 387-397 (1994) |
1993 |
5 | | Subir Roy,
H. Narayanan:
Application of the principal partition and principal lattice of partitions of a graph to the problem of decomposition of a finite state machine.
ISCAS 1993: 2564-2567 |
1992 |
4 | | Sachin B. Patkar,
H. Narayanan:
Fast Sequential and Randomised Parallel Algorithms for Rigidity and approximate Min k-cut.
FSTTCS 1992: 265-278 |
3 | | Sachin B. Patkar,
H. Narayanan:
Principal Lattice of Partition of submodular functions on Graphs: Fast algorithms for Principal Partition and Generic Rigidity.
ISAAC 1992: 41-50 |
2 | EE | H. Narayanan,
Huzur Saran,
Vijay V. Vazirani:
Randomized Parallel Algorithms for Matroid Union and Intersection, with Applications to Arboresences and Edge-Disjoint Spanning Trees.
SODA 1992: 357-366 |
1991 |
1 | | Sachin B. Patkar,
H. Narayanan:
A Fast Algorithm for the Principle Partition of a Graph.
FSTTCS 1991: 288-306 |