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2006 | ||
---|---|---|
2 | EE | R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopal, N. Guruprasad, K. Subbarangaiah, Taher Abbasi, D. V. R. Murthy, P. Krishna Prasad, D. R. Gude: A Comprehensive SoC Design Methodology for Nanometer Design Challenges. VLSI Design 2006: 15-17 |
1999 | ||
1 | EE | D. V. R. Murthy, S. Ramachandran, S. Srinivasan: Parallel Implementation of 2D-Discrete Cosine Transform Using EPLDs. VLSI Design 1999: 336-339 |
1 | Taher Abbasi | [2] |
2 | Ricky Bedi | [2] |
3 | D. R. Gude | [2] |
4 | N. Guruprasad | [2] |
5 | R. Raghavendra Kumar | [2] |
6 | P. Krishna Prasad | [2] |
7 | Ramadas Rajagopal | [2] |
8 | S. Ramachandran | [1] |
9 | S. Srinivasan | [1] |
10 | K. Subbarangaiah | [2] |