2007 |
11 | EE | Loganathan Lingappan,
Vijay Gangaram,
Niraj K. Jha:
Fast Enhancement of Validation Test Sets to Improve Stuck-at Fault Coverage for RTL circuits.
VLSI Design 2007: 504-512 |
10 | EE | Pallav Gupta,
Niraj K. Jha,
Loganathan Lingappan:
A Test Generation Framework for Quantum Cellular Automata Circuits.
IEEE Trans. VLSI Syst. 15(1): 24-36 (2007) |
9 | EE | Loganathan Lingappan,
Niraj K. Jha:
Satisfiability-Based Automatic Test Program Generation and Design for Testability for Microprocessors.
IEEE Trans. VLSI Syst. 15(5): 518-530 (2007) |
8 | EE | Loganathan Lingappan,
Niraj K. Jha:
Efficient Design for Testability Solution Based on Unsatisfiability for Register-Transfer Level Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1339-1345 (2007) |
2006 |
7 | EE | Pallav Gupta,
Niraj K. Jha,
Loganathan Lingappan:
Test generation for combinational quantum cellular automata (QCA) circuits.
DATE 2006: 311-316 |
6 | EE | Loganathan Lingappan,
Niraj K. Jha:
Improving the Performance of Automatic Sequential Test Generation by Targeting Hard-to-Test Faults.
VLSI Design 2006: 431-436 |
5 | EE | Loganathan Lingappan,
Srivaths Ravi,
Anand Raghunathan,
Niraj K. Jha,
Srimat T. Chakradhar:
Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2193-2206 (2006) |
4 | EE | Loganathan Lingappan,
Srivaths Ravi,
Niraj K. Jha:
Satisfiability-based test generation for nonseparable RTL controller-datapath circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(3): 544-557 (2006) |
2005 |
3 | EE | Loganathan Lingappan,
Srivaths Ravi,
Anand Raghunathan,
Niraj K. Jha,
Srimat T. Chakradhar:
Heterogeneous and Multi-Level Compression Techniques for Test Volume Reduction in Systems-on-Chip.
VLSI Design 2005: 65-70 |
2 | EE | Loganathan Lingappan,
Niraj K. Jha:
Unsatisfiability Based Efficient Design for Testability Solution for Register-Transfer Level Circuits.
VTS 2005: 418-423 |
2003 |
1 | EE | Loganathan Lingappan,
Srivaths Ravi,
Niraj K. Jha:
Test Generation for Non-separable RTL Controller-datapath Circuits using a Satisfiability based Approach.
ICCD 2003: 187-193 |