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Samiran Ganguly

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2007
2EEDeblina Sarkar, Samiran Ganguly, Deepanjan Datta, A. Ananda Prasad Sarab, Sudeb Dasgupta: Modeling of Leakages in Nano-Scale DG MOSFET to Implement Low Power SRAM: A Device/Circuit Co-Design. VLSI Design 2007: 183-188
2006
1EEDeepanjan Datta, Samiran Ganguly: Design of Multi-bit SET Adder and Its Fault Simulation. VLSI Design 2006: 549-552

Coauthor Index

1Sudeb Dasgupta [2]
2Deepanjan Datta [1] [2]
3A. Ananda Prasad Sarab [2]
4Deblina Sarkar [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)