| |
| 2007 | ||
|---|---|---|
| 2 | EE | Deblina Sarkar, Samiran Ganguly, Deepanjan Datta, A. Ananda Prasad Sarab, Sudeb Dasgupta: Modeling of Leakages in Nano-Scale DG MOSFET to Implement Low Power SRAM: A Device/Circuit Co-Design. VLSI Design 2007: 183-188 |
| 2006 | ||
| 1 | EE | Deepanjan Datta, Samiran Ganguly: Design of Multi-bit SET Adder and Its Fault Simulation. VLSI Design 2006: 549-552 |
| 1 | Sudeb Dasgupta | [2] |
| 2 | Deepanjan Datta | [1] [2] |
| 3 | A. Ananda Prasad Sarab | [2] |
| 4 | Deblina Sarkar | [2] |