| 2006 |
|---|
| 4 | EE | Mukesh Ranjan,
Ranga Vemuri:
Exact hierarchical symbolic analysis of large analog networks using a general interconnection template.
ISCAS 2006 |
| 3 | EE | Ritochit Chakraborty,
Mukesh Ranjan,
Ranga Vemuri:
Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction.
VLSI Design 2006: 689-694 |
| 2005 |
|---|
| 2 | EE | Huiying Yang,
Mukesh Ranjan,
Wim Verhaegen,
Mengmeng Ding,
Ranga Vemuri,
Georges G. E. Gielen:
Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams.
ASP-DAC 2005: 230-235 |
| 2004 |
|---|
| 1 | EE | Mukesh Ranjan,
Wim Verhaegen,
Anuradha Agarwal,
Hemanth Sampath,
Ranga Vemuri,
Georges G. E. Gielen:
Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models.
DATE 2004: 604-609 |
