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| 2006 | ||
|---|---|---|
| 2 | EE | Motoi Ichihashi, Haruki Toda: Performance Measurement and Improvement of Asymmetric Three-Tr. Cell (ATC) DRAM toward 0.3V Memory Array Operation. VLSI Design 2006: 487-490 |
| 1 | EE | Koichiro Ishibashi, Tetsuya Fujimoto, Takahiro Yamashita, Hiroyuki Okada, Yukio Arima, Yasuyuki Hashimoto, Kohji Sakata, Isao Minematsu, Yasuo Itoh, Haruki Toda, Motoi Ichihashi, Yoshihide Komatsu, Masato Hagiwara, Toshiro Tsukada: Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. IEICE Transactions 89-C(3): 250-262 (2006) |
| 1 | Yukio Arima | [1] |
| 2 | Tetsuya Fujimoto | [1] |
| 3 | Masato Hagiwara | [1] |
| 4 | Yasuyuki Hashimoto | [1] |
| 5 | Motoi Ichihashi | [1] [2] |
| 6 | Koichiro Ishibashi | [1] |
| 7 | Yasuo Itoh | [1] |
| 8 | Yoshihide Komatsu | [1] |
| 9 | Isao Minematsu | [1] |
| 10 | Hiroyuki Okada | [1] |
| 11 | Kohji Sakata | [1] |
| 12 | Toshiro Tsukada | [1] |
| 13 | Takahiro Yamashita | [1] |