| |
| 2006 | ||
|---|---|---|
| 3 | EE | Alkan Cengiz, Tom Chen: Routing-Tree Construction with Concurrent Performance, Power and Congestion Optimization. ISVLSI 2006: 367-372 |
| 2 | EE | Alkan Cengiz, Tom Chen: A Progressive Two-Stage Global Routing for Macro-Cell Based Designs. VLSI Design 2006: 777-780 |
| 2000 | ||
| 1 | EE | Tom Chen, Alkan Cengiz: Measuring routing congestion for multi-layer global routing. ACM Great Lakes Symposium on VLSI 2000: 59-62 |
| 1 | Tom Chen | [1] [2] [3] |