| 2006 |
|---|
| 4 | EE | Rajan Konar,
Rajarshee P. Bharadwaj,
Dinesh Bhatia,
Poras T. Balsara:
Exploring Logic Block Granularity in Leakage Tolerant FPGA.
VLSI Design 2006: 754-757 |
| 2005 |
|---|
| 3 | EE | Rajarshee P. Bharadwaj,
Rajan Konar,
Poras T. Balsara,
Dinesh Bhatia:
Exploiting temporal idleness to reduce leakage power in programmable architectures.
ASP-DAC 2005: 651-656 |
| 2 | | Rajarshee P. Bharadwaj:
Next Generation Architectures and CAD for Power Aware Programmable Fabrics.
FPL 2005: 735-738 |
| 1 | | Rajarshee P. Bharadwaj,
Rajan Konar,
Dinesh Bhatia,
Poras T. Balsara:
FPGA Architecture for Standby Power Management.
FPT 2005: 181-188 |
