| 2007 |
|---|
| 7 | EE | Matthew M. Ziegler,
Gary S. Ditlow,
Stephen V. Kosonocky,
Zhenyu Qi,
Mircea R. Stan:
Structured and tuned array generation (STAG) for high-performance random logic.
ACM Great Lakes Symposium on VLSI 2007: 257-262 |
| 6 | EE | Zhenyu Qi,
Matthew M. Ziegler,
Stephen V. Kosonocky,
Jan M. Rabaey,
Mircea R. Stan:
Multi-Dimensional Circuit and Micro-Architecture Level Optimization.
ISQED 2007: 275-280 |
| 2006 |
|---|
| 5 | EE | Mircea R. Stan,
Garrett S. Rose,
Matthew M. Ziegler:
Hybrid CMOS/Molecular Electronic Circuits.
VLSI Design 2006: 703-708 |
| 2004 |
|---|
| 4 | EE | Matthew M. Ziegler,
Mircea R. Stan:
A Unified Design Space for Regular Parallel Prefix Adders.
DATE 2004: 1386-1387 |
| 3 | EE | Garrett S. Rose,
Matthew M. Ziegler,
Mircea R. Stan:
Large-signal two-terminal device model for nanoelectronic circuit analysis.
IEEE Trans. VLSI Syst. 12(11): 1201-1208 (2004) |
| 2003 |
|---|
| 2 | EE | Matthew M. Ziegler,
Mircea R. Stan:
The CMOS/nano interface from a circuits perspective.
ISCAS (4) 2003: 904-907 |
| 2002 |
|---|
| 1 | EE | Matthew M. Ziegler,
Mircea R. Stan:
A Case for CMOS/nano co-design.
ICCAD 2002: 348-352 |
