| 2006 |
|---|
| 9 | EE | Qianneng Zhou,
Fengchang Lai,
Mingyan Yu:
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips.
ACM Great Lakes Symposium on VLSI 2006: 140-143 |
| 8 | EE | Tong Zhou,
Zhibo Zhou,
Mingyan Yu,
Yizheng Ye:
Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator.
APCCAS 2006: 1955-1958 |
| 7 | EE | Qianneng Zhou,
Fengchang Lai,
Mingyan Yu:
Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip.
APCCAS 2006: 670-673 |
| 6 | EE | Zhiqiang Gao,
Mingyan Yu,
Yizheng Ye,
Jianguo Ma:
A CMOS bandpass filter with wide-tuning range for wireless applications.
ISCAS 2006 |
| 5 | EE | Guochi Huang,
Tae-Sung Kim,
Byung-Sung Kim,
Mingyan Yu,
Yizheng Ye:
Post linearization of CMOS LNA using double cascade FETs.
ISCAS 2006 |
| 4 | EE | Tong Zhou,
Mingyan Yu,
Yizheng Ye:
A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor.
VLSI Design 2006: 216-221 |
| 3 | EE | Zhiyuan Li,
Mingyan Yu,
Jianguo Ma:
A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs.
VLSI Design 2006: 563-568 |
| 2005 |
|---|
| 2 | EE | Zhiqiang Gao,
Jianguo Ma,
Yizheng Ye,
Mingyan Yu:
Large tuning band range of high frequency filter for wireless applications.
ISCAS (1) 2005: 384-387 |
| 2003 |
|---|
| 1 | EE | Yong-sheng Wang,
Liyi Xiao,
Mingyan Yu,
Jinxiang Wang,
Yizheng Ye:
A Test Architecture for System-on-a-Chip.
Asian Test Symposium 2003: 506 |
