2009 |
9 | EE | Harika Manem,
Garrett S. Rose:
The effects of logic partitioning in a majority logic based CMOS-NANO FPGA.
ACM Great Lakes Symposium on VLSI 2009: 157-160 |
8 | EE | Yongji Jiang,
Garrett S. Rose:
A dual-MOSFET equivalent resistor thermal sensor.
ACM Great Lakes Symposium on VLSI 2009: 181-184 |
2008 |
7 | EE | Harika Manem,
Peter C. Paliwoda,
Garrett S. Rose:
A hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays.
ACM Great Lakes Symposium on VLSI 2008: 249-254 |
2007 |
6 | EE | Nadine Gergel-Hackett,
Garrett S. Rose,
Peter C. Paliwoda,
Christina A. Hacker,
Curt A. Richter:
On-chip characterization of molecular electronic devices using CMOS: the design and simulation of a hybrid circuit based on experimental molecular electronic device results.
ACM Great Lakes Symposium on VLSI 2007: 108-113 |
5 | EE | Garrett S. Rose,
Yuxing Yao,
James M. Tour,
Adam C. Cabe,
Nadine Gergel-Hackett,
Nabanita Majumdar,
John C. Bean,
Lloyd R. Harriott,
Mircea R. Stan:
Designing CMOS/molecular memories while considering device parameter variations.
JETC 3(1): (2007) |
2006 |
4 | EE | Garrett S. Rose,
Adam C. Cabe,
Nadine Gergel-Hackett,
Nabanita Majumdar,
Mircea R. Stan,
John C. Bean,
Lloyd R. Harriott,
Yuxing Yao,
James M. Tour:
Design approaches for hybrid CMOS/molecular memory based on experimental device data.
ACM Great Lakes Symposium on VLSI 2006: 2-7 |
3 | EE | Garrett S. Rose,
Mircea R. Stan:
A programmable majority logic array using molecular scale electronics.
FPGA 2006: 225 |
2 | EE | Mircea R. Stan,
Garrett S. Rose,
Matthew M. Ziegler:
Hybrid CMOS/Molecular Electronic Circuits.
VLSI Design 2006: 703-708 |
2004 |
1 | EE | Garrett S. Rose,
Matthew M. Ziegler,
Mircea R. Stan:
Large-signal two-terminal device model for nanoelectronic circuit analysis.
IEEE Trans. VLSI Syst. 12(11): 1201-1208 (2004) |