2008 | ||
---|---|---|
54 | EE | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown: Clock tree synthesis with data-path sensitivity matching. ASP-DAC 2008: 498-503 |
53 | EE | Michael S. McCorquodale, Scott M. Pernia, Sundus Kubba, Gordy A. Carichner, Justin D. O'Day, Eric D. Marsman, Jon Kuhn, Richard B. Brown: A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces. ISCAS 2008: 2837-2840 |
52 | EE | Amlan Ghosh, Rahul M. Rao, Ching-Te Chuang, Richard B. Brown: On-Chip Process Variation Detection and Compensation Using Delay and Slew-Rate Monitoring Circuits. ISQED 2008: 815-820 |
51 | EE | Amlan Ghosh, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang, Richard B. Brown: On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit. VLSI Design 2008: 143-149 |
2007 | ||
50 | EE | Kanak Agarwal, Rahul M. Rao, Dennis Sylvester, Richard B. Brown: Parametric Yield Analysis and Optimization in Leakage Dominated Technologies. IEEE Trans. VLSI Syst. 15(6): 613-623 (2007) |
2006 | ||
49 | EE | Michael S. McCorquodale, James L. McCann, Richard B. Brown: Newton: a library-based analytical synthesis tool for RF-MEMS resonators. ASP-DAC 2006: 279-284 |
48 | EE | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown: Process-induced skew reduction in nominal zero-skew clock trees. ASP-DAC 2006: 84-89 |
47 | EE | Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Richard B. Brown: A 16-bit, low-power microsystem with monolithic MEMS-LC clocking. ASP-DAC 2006: 94-95 |
46 | EE | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown: Clock buffer and wire sizing using sequential programming. DAC 2006: 1041-1046 |
45 | EE | Eric D. Marsman, Robert M. Senger, Gordy A. Carichner, Sundus Kubba, Michael S. McCorquodale, Richard B. Brown: DSP architecture for cochlear implants. ISCAS 2006 |
44 | EE | Timothy D. Strong, Steven M. Martin, R. F. Franklin, Richard B. Brown: Integrated electrochemical neurosensors. ISCAS 2006 |
43 | EE | Robert M. Senger, Eric D. Marsman, Gordy A. Carichner, Sundus Kubba, Michael S. McCorquodale, Richard B. Brown: Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking. ISCAS 2006 |
42 | EE | Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka: A dual-VDD boosted pulsed bus technique for low power and low leakage operation. ISLPED 2006: 73-78 |
41 | EE | Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown: Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems. VLSI Design 2006: 89-93 |
2005 | ||
40 | EE | Matthew R. Guthaus, Natesan Venkateswaran, Vladimir Zolotov, Dennis Sylvester, Richard B. Brown: Optimization objectives and models of variation for statistical gate sizing. ACM Great Lakes Symposium on VLSI 2005: 313-316 |
39 | EE | Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown: Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. CGO 2005: 179-190 |
38 | EE | Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Himanshu Kaul, Richard B. Brown, Sani R. Nassif: Power-aware global signaling strategies. ISCAS (1) 2005: 604-607 |
37 | EE | Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown: Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED 2005: 284-290 |
36 | EE | Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown: Controlled-Load Limited Switch Dynamic Logic Circuit. ISQED 2005: 83-87 |
35 | EE | Harmander Deogun, Rahul M. Rao, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka: Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization. ISQED 2005: 88-93 |
34 | EE | Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown: Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Trans. Computers 54(8): 998-1012 (2005) |
2004 | ||
33 | EE | Steven M. Martin, Timothy D. Strong, Richard B. Brown: Design, Implementation, and Verification of a CMOS-Integrated Chemical Sensor System. ICMENS 2004: 379-385 |
32 | Steven M. Martin, Fadi H. Gebara, Timothy D. Strong, Richard B. Brown: A low-voltage, chemical sensor interface for systems-on-chip: the fully-differential potentiostat. ISCAS (4) 2004: 892-895 | |
31 | EE | Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif: Approaches to run-time and standby mode leakage reduction in global buses. ISLPED 2004: 188-193 |
30 | EE | Rahul M. Rao, Jeffrey L. Burns, Richard B. Brown: Analysis and Optimization of Enhanced MTCMOS Scheme. VLSI Design 2004: 234-239 |
2003 | ||
29 | EE | Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown: Increasing the number of effective registers in a low-power processor using a windowed register file. CASES 2003: 125-136 |
28 | EE | Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Matthew R. Guthaus, Richard B. Brown: A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference. DAC 2003: 520-525 |
27 | EE | Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Eric D. Marsman, Robert M. Senger, Richard B. Brown: A Top-Down Microsystems Design Methodology and Associated Challenges . DATE 2003: 20292-20296 |
26 | EE | Rahul M. Rao, Frank Liu, Jeffrey L. Burns, Richard B. Brown: A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits. ICCAD 2003: 689-692 |
25 | EE | Michael S. McCorquodale, Mei Kim Ding, Richard B. Brown: Study and simulation of CMOS LC oscillator phase noise and jitter. ISCAS (1) 2003: 665-668 |
24 | EE | Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown: Efficient techniques for gate leakage estimation. ISLPED 2003: 100-103 |
23 | EE | Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown: New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology. ISLPED 2003: 168-171 |
22 | EE | Koushik K. Das, Richard B. Brown: Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS. ISVLSI 2003: 29-34 |
21 | EE | Koushik K. Das, Richard B. Brown: Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology. VLSI Design 2003: 291-296 |
20 | Alan J. Drake, Kevin J. Nowka, Richard B. Brown: Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI. VLSI-SOC 2003: 263- | |
19 | Michael S. McCorquodale, Eric D. Marsman, Robert M. Senger, Fadi H. Gebara, Richard B. Brown: Microsystem and SoC Design with UMIPS. VLSI-SOC 2003: 324- | |
2001 | ||
18 | EE | Claude R. Gauthier, Jayakumaran Sivagnaname, Richard B. Brown: Dynamic Receiver Biasing For Inter-Chip Communication. ARVLSI 2001: 101-111 |
2000 | ||
17 | EE | Alan J. Drake, Todd D. Basso, Spencer M. Gold, Keith L. Kraver, Phiroze N. Parakh, Claude R. Gauthier, P. Sean Stetson, Richard B. Brown: CGaAs PowerPC FXU. DAC 2000: 730-735 |
1999 | ||
16 | EE | Spencer M. Gold, Richard B. Brown, Bruce Bernhardt: A Quantitative Approach to Nonlinear Process Design Rule Scaling. ARVLSI 1999: 99-113 |
15 | EE | Phiroze N. Parakh, Richard B. Brown: Crosstalk constrained global route embedding. ISPD 1999: 201-206 |
1998 | ||
14 | EE | Phiroze N. Parakh, Richard B. Brown, Karem A. Sakallah: Congestion Driven Quadratic Placement. DAC 1998: 275-278 |
13 | EE | David Van Campenhout, Hussain Al-Asaad, John P. Hayes, Trevor N. Mudge, Richard B. Brown: High-level design verification of microprocessors via error modeling. ACM Trans. Design Autom. Electr. Syst. 3(4): 581-599 (1998) |
12 | EE | Richard B. Brown, Bruce Bernhardt, M. LaMacchia, J. Abrokwah, Phiroze N. Parakh, Todd D. Basso, Spencer M. Gold, S. Stetson, Claude R. Gauthier, D. Foster, B. Crawforth, T. McQuire, Karem A. Sakallah, Ronald J. Lomax, Trevor N. Mudge: Overview of complementary GaAs technology for high-speed VLSI circuits. IEEE Trans. VLSI Syst. 6(1): 47-51 (1998) |
1997 | ||
11 | Kunle Olukotun, Trevor N. Mudge, Richard B. Brown: Multilevel Optimization of Pipelined Caches. IEEE Trans. Computers 46(10): 1083-1102 (1997) | |
1996 | ||
10 | EE | Michael A. Riepe, João P. Marques Silva, Karem A. Sakallah, Richard B. Brown: Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation. IEEE Trans. VLSI Syst. 4(1): 113-129 (1996) |
1995 | ||
9 | EE | Ajay Chandna, C. David Kibler, Richard B. Brown, Mark Roberts, Karem A. Sakallah: The Aurora RAM Compiler. DAC 1995: 261-266 |
1994 | ||
8 | Michael Upton, Thomas Huff, Trevor N. Mudge, Richard B. Brown: Resource Allocation in a High Clock Rate Microprocessor. ASPLOS 1994: 98-109 | |
7 | EE | Richard Uhlig, David Nagle, Timothy J. Stanley, Trevor N. Mudge, Stuart Sechrest, Richard B. Brown: Design Tradeoffs for Software-Managed TLBs. ACM Trans. Comput. Syst. 12(3): 175-205 (1994) |
1993 | ||
6 | Michael A. Riepe, João P. Marques Silva, Karem A. Sakallah, Richard B. Brown: Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation. ICCD 1993: 361-364 | |
5 | David Nagle, Richard Uhlig, Timothy J. Stanley, Stuart Sechrest, Trevor N. Mudge, Richard B. Brown: Design Tradeoffs for Software-Managed TLBs. ISCA 1993: 27-38 | |
4 | EE | Timothy J. Stanley, Michael Upton, Patrick Sherhart, Trevor N. Mudge, Richard B. Brown: A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus. MICRO 1993: 31-40 |
1992 | ||
3 | Kunle Olukotun, Trevor N. Mudge, Richard B. Brown: Performance Optimization of Pipelined Primary Caches. ISCA 1992: 181-190 | |
1991 | ||
2 | EE | Kunle Olukotun, Trevor N. Mudge, Richard B. Brown: Implementing a Cache for a High-Performance GaAs Microprocessor. ISCA 1991: 138-147 |
1 | Trevor N. Mudge, Richard B. Brown, William P. Bimingham, Jeffrey A. Dykstra, Ayman I. Kayssi, Ronald J. Lomax, Kunle Olukotun, Karem A. Sakallah, Raymond A. Milano: The Design of a Microsupercomputer. IEEE Computer 24(1): 57-64 (1991) |