| 2008 |
|---|
| 82 | EE | Fang Lu,
Lei Wang,
Xiaobing Feng,
Zhiyuan Li,
Zhaoqing Zhang:
Exploiting idle register classes for fast spill destination.
ICS 2008: 319-326 |
| 81 | EE | Lixia Liu,
Zhiyuan Li,
Ahmed H. Sameh:
Analyzing memory access intensity in parallel programs on multicore.
ICS 2008: 359-367 |
| 80 | EE | Russell Meyers,
Zhiyuan Li:
ASYNC Loop Constructs for Relaxed Synchronization.
LCPC 2008: 292-303 |
| 79 | EE | Vinaitheerthan Sundaram,
Saurabh Bagchi,
Yung-Hsiang Lu,
Zhiyuan Li:
SeNDORComm: An Energy-Efficient Priority-Driven Communication Layer for Reliable Wireless Sensor Networks.
SRDS 2008: 23-32 |
| 78 | EE | Changjiu Xian,
Yung-Hsiang Lu,
Zhiyuan Li:
Dynamic Voltage Scaling for Multitasking Real-Time Systems With Uncertain Execution Time.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1467-1478 (2008) |
| 2007 |
|---|
| 77 | | Santosh Pande,
Zhiyuan Li:
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California, USA, June 13-15, 2007
ACM 2007 |
| 76 | EE | Changjiu Xian,
Yung-Hsiang Lu,
Zhiyuan Li:
Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time.
DAC 2007: 664-669 |
| 75 | EE | Changjiu Xian,
Yung-Hsiang Lu,
Zhiyuan Li:
Adaptive computation offloading for energy conservation on battery-powered systems.
ICPADS 2007: 1-8 |
| 74 | EE | Changjiu Xian,
Yung-Hsiang Lu,
Zhiyuan Li:
A programming environment with runtime energy characterization for energy-aware applications.
ISLPED 2007: 141-146 |
| 73 | EE | Zhiyuan Li:
Simultaneous Minimization of Capacity and Conflict Misses.
J. Comput. Sci. Technol. 22(4): 497-504 (2007) |
| 72 | EE | Douglas Herbert,
Vinaitheerthan Sundaram,
Yung-Hsiang Lu,
Saurabh Bagchi,
Zhiyuan Li:
Adaptive correctness monitoring for wireless sensor networks using hierarchical distributed run-time invariant checking.
TAAS 2(3): (2007) |
| 2006 |
|---|
| 71 | EE | Douglas Herbert,
Yung-Hsiang Lu,
Saurabh Bagchi,
Zhiyuan Li:
Detection and Repair of Software Errors in Hierarchical Sensor Networks.
SUTC (1) 2006: 403-410 |
| 70 | EE | Zhiyuan Li,
Mingyan Yu,
Jianguo Ma:
A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs.
VLSI Design 2006: 563-568 |
| 2005 |
|---|
| 69 | | Rudolf Eigenmann,
Zhiyuan Li,
Samuel P. Midkiff:
Languages and Compilers for High Performance Computing, 17th International Workshop, LCPC 2004, West Lafayette, IN, USA, September 22-24, 2004, Revised Selected Papers
Springer 2005 |
| 68 | EE | Rong Xu,
Zhiyuan Li:
A sample-based cache mapping scheme.
LCTES 2005: 166-174 |
| 67 | EE | Yonghong Song,
Cheng Wang,
Zhiyuan Li:
A Polynomial-Time Algorithm for Memory Space Reduction.
International Journal of Parallel Programming 33(1): 1-33 (2005) |
| 66 | EE | Zhiyuan Li,
Rong Xu:
Page mapping for heterogeneously partitioned caches: Complexity and heuristics.
J. Embedded Computing 1(4): 471-485 (2005) |
| 2004 |
|---|
| 65 | EE | Yonghua Ding,
Zhiyuan Li:
A Compiler Scheme for Reusing Intermediate Computation Results.
CGO 2004: 279-290 |
| 64 | | Yuldi Tirta,
Zhiyuan Li,
Yung-Hsiang Lu,
Saurabh Bagchi:
Efficient Collection of Sensor Data in Remote Fields Using Mobile Collectors.
ICCCN 2004: 515-520 |
| 63 | EE | Yonghong Song,
Zhiyuan Li:
Applying Array Contraction to a Sequence of DOALL Loops.
ICPP 2004: 46-53 |
| 62 | EE | Rong Xu,
Zhiyuan Li:
Using cache mapping to improve memory performance handheld devices.
ISPASS 2004: 106-114 |
| 61 | EE | Cheng Wang,
Zhiyuan Li:
Parametric analysis for adaptive computation offloading.
PLDI 2004: 119-130 |
| 60 | EE | Zhiyuan Li,
Yonghong Song:
Automatic tiling of iterative stencil loops.
ACM Trans. Program. Lang. Syst. 26(6): 975-1028 (2004) |
| 59 | EE | Yonghong Song,
Rong Xu,
Cheng Wang,
Zhiyuan Li:
Improving Data Locality by Array Contraction.
IEEE Trans. Computers 53(9): 1073-1084 (2004) |
| 58 | EE | Cheng Wang,
Zhiyuan Li:
A computation offloading scheme on handheld devices.
J. Parallel Distrib. Comput. 64(6): 740-746 (2004) |
| 57 | EE | Peifeng Ni,
Zhiyuan Li:
Energy cost analysis of IPSec on handheld devices.
Microprocessors and Microsystems 28(10): 585-594 (2004) |
| 2003 |
|---|
| 56 | EE | Rong Xu,
Zhiyuan Li,
Cheng Wang,
Peifeng Ni:
Impact of Data Compression on Energy Consumption of Wireless-Networked Handheld Devices.
ICDCS 2003: 302-311 |
| 55 | EE | Zhiyuan Li:
Optimal Skewed Tiling for Cache Locality Enhancement.
IPDPS 2003: 37 |
| 54 | EE | Yonghua Ding,
Zhiyuan Li:
Operation Reuse on Handheld Devices (Extended Abstract).
LCPC 2003: 273-287 |
| 53 | EE | Yonghua Ding,
Zhiyuan Li:
A Compiler Analysis of Interprocedural Data Communication.
SC 2003: 11 |
| 2002 |
|---|
| 52 | EE | Zhiyuan Li,
Scott Hauck:
Configuration prefetching techniques for partial reconfigurable coprocessor with relocation and defragmentation.
FPGA 2002: 187-195 |
| 51 | EE | Zhiyuan Li,
Cheng Wang,
Rong Xu:
Task Allocation for Distributed Multimedia Processing on Wirelessly Networked Handheld Devices.
IPDPS 2002 |
| 50 | EE | Katherine Compton,
Zhiyuan Li,
James Cooley,
Stephen Knol,
Scott Hauck:
Configuration relocation and defragmentation for run-time reconfigurable computing.
IEEE Trans. VLSI Syst. 10(3): 209-220 (2002) |
| 2001 |
|---|
| 49 | EE | Zhiyuan Li,
Cheng Wang,
Rong Xu:
Computation offloading to save energy on handheld devices: a partition scheme.
CASES 2001: 238-246 |
| 48 | EE | Zhiyuan Li,
Junjie Gu,
Gyungho Lee:
Interprocedural Analysis Based on Guarded Array Regions.
Compiler Optimizations for Scalable Parallel Systems Languages 2001: 221-246 |
| 47 | EE | Yonghong Song,
Rong Xu,
Cheng Wang,
Zhiyuan Li:
Data locality enhancement by memory reduction.
ICS 2001: 50-64 |
| 46 | EE | Yonghong Song,
Cheng Wang,
Zhiyuan Li:
Locality Enhancement by Array Contraction.
LCPC 2001: 132-146 |
| 45 | EE | Yonghua Ding,
Zhiyuan Li:
An Adaptive Scheme for Dynamic Parallelization.
LCPC 2001: 274-289 |
| 44 | EE | Guohua Jin,
Zhiyuan Li,
Fujie Chen:
A theoretical foundation for program transformations to reduce cache thrashing due to true data sharing.
Theor. Comput. Sci. 255(1-2): 449-481 (2001) |
| 2000 |
|---|
| 43 | EE | Zhiyuan Li,
Katherine Compton,
Scott Hauck:
Configuration Caching Management Techniques for Reconfigurable Computing.
FCCM 2000: 22-38 |
| 42 | EE | Junjie Gu,
Zhiyuan Li:
Efficient Interprocedural Array Data-Flow Analysis for Automatic Program Parallelization.
IEEE Trans. Software Eng. 26(3): 244-261 (2000) |
| 41 | EE | Zhiyuan Li,
Junjie Gu:
A Hierarchical Reasoning System for Automatic Program Parallelization.
International Journal on Artificial Intelligence Tools 9(3): 417-435 (2000) |
| 1999 |
|---|
| 40 | | Siddhartha Chatterjee,
Jan Prins,
Larry Carter,
Jeanne Ferrante,
Zhiyuan Li,
David C. Sehr,
Pen-Chung Yew:
Languages and Compilers for Parallel Computing, 11th International Workshop, LCPC'98, Chapel Hill, NC, USA, August 7-9, 1998, Proceedings
Springer 1999 |
| 39 | EE | Zhiyuan Li,
Scott Hauck:
Don't Care Discovery for FPGA Configuration Compression.
FPGA 1999: 91-98 |
| 38 | EE | Zhiyuan Li:
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays.
IEEE PACT 1999: 183-190 |
| 37 | EE | Yonghong Song,
Zhiyuan Li:
A Compiler Framework for Tiling Imperfectly-Nested Loops.
LCPC 1999: 185-200 |
| 36 | EE | Yonghong Song,
Zhiyuan Li:
New Tiling Techniques to Improve Cache Temporal Locality.
PLDI 1999: 215-228 |
| 35 | EE | Scott Hauck,
Zhiyuan Li,
Eric J. Schwabe:
Configuration compression for the Xilinx XC6200 FPGA.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1107-1113 (1999) |
| 1998 |
|---|
| 34 | | Zhiyuan Li,
Pen-Chung Yew,
Siddhartha Chatterjee,
Chua-Huang Huang,
P. Sadayappan,
David C. Sehr:
Languages and Compilers for Parallel Computing, 10th International Workshop, LCPC'97, Minneapolis, Minnesota, USA, August 7-9, 1997, Proceedings
Springer 1998 |
| 33 | EE | Scott Hauck,
Zhiyuan Li,
Eric J. Schwabe:
Configuration Compression for the Xilinx XC6200 FPGA.
FCCM 1998: 138-146 |
| 32 | EE | Sangyeun Cho,
Jenn-Yuan Tsai,
Yonghong Song,
Bixia Zheng,
Stephen J. Schwinn,
Xin Wang,
Qing Zhao,
Zhiyuan Li,
David J. Lilja,
Pen-Chung Yew:
High-Level Information - An Approach for Integrating Front-End and Back-End Compilers.
ICPP 1998: 346-355 |
| 31 | | Guohua Jin,
Zhiyuan Li,
Fujie Chen:
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing.
IEEE Trans. Computers 47(5): 527-543 (1998) |
| 30 | | Zhiyuan Li,
Pen-Chung Yew:
Introduction.
International Journal of Parallel Programming 26(5): 539-540 (1998) |
| 29 | | Zhiyuan Li,
Pen-Chung Yew:
Introduction.
International Journal of Parallel Programming 26(6): 639-640 (1998) |
| 28 | EE | Jenn-Yuan Tsai,
Zhenzhen Jiang,
Zhiyuan Li,
David J. Lilja,
Xin Wang,
Pen-Chung Yew,
Bixia Zheng,
Stephen J. Schwinn:
Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading.
J. Inf. Sci. Eng. 14(1): 205-222 (1998) |
| 27 | | Trung N. Nguyen,
Zhiyuan Li:
Interprocedural Analysis for Loop Scheduling and Data Allocation.
Parallel Computing 24(3-4): 477-504 (1998) |
| 1997 |
|---|
| 26 | EE | Shiwa S. Fu,
Nian-Feng Tzeng,
Zhiyuan Li:
Empirical Evaluation of Distributed Mutual Exclusion Algorithms.
IPPS 1997: 255-259 |
| 25 | | Junjie Gu,
Zhiyuan Li,
Gyungho Lee:
Experience with Efficient Array Data-Flow Analysis for Array Privatization.
PPOPP 1997: 157-167 |
| 1996 |
|---|
| 24 | | Zhiyuan Li,
Jenn-Yuan Tsai,
Xin Wang,
Pen-Chung Yew,
Bess Zheng:
Compiler Techniques for Concurrent Multithreading with Hardware Speculation Support.
LCPC 1996: 175-191 |
| 1995 |
|---|
| 23 | EE | John Willis,
Zhiyuan Li,
Tsang-Puu Lin:
Use of embedded scheduling to compile VHDL for effective parallel simulation.
EURO-DAC 1995: 400-405 |
| 22 | | Trung N. Nguyen,
Junjie Gu,
Zhiyuan Li:
An Interprocedural Parallelizing Compiler and Its Support for Memory Hierarchy Research.
LCPC 1995: 96-110 |
| 21 | EE | Junjie Gu,
Zhiyuan Li,
Gyungho Lee:
Symbolic Array Dataflow Analysis for Array Privatization and Program Parallelization.
SC 1995 |
| 1994 |
|---|
| 20 | | Zhiyuan Li,
Trung N. Nguyen:
An Empirical Study of the Workload Distribution Under Static Scheduling.
ICPP 1994: 259-263 |
| 19 | | Trung N. Nguyen,
Farnaz Mounes-Toussi,
David J. Lilja,
Zhiyuan Li:
A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement.
IFIP PACT 1994: 69-78 |
| 18 | | Zhiyuan Li:
Software Assistance for Directory-Based Caches.
IPPS 1994: 151-157 |
| 17 | EE | Farnaz Mounes-Toussi,
David J. Lilja,
Zhiyuan Li:
An evaluation of a compiler optimization for improving the performance of a coherence directory.
International Conference on Supercomputing 1994: 75-84 |
| 1993 |
|---|
| 16 | | Trung N. Nguyen,
Zhiyuan Li,
David J. Lilja:
Efficient Use of Dynamically Tagged Directories Through Compiler Analysis
ICPP 1993: 112-119 |
| 15 | | David J. Kuck,
Edward S. Davidson,
Duncan H. Lawrie,
Ahmed H. Sameh,
Chuan-Qi Zhu,
Alexander V. Veidenbaum,
Jeff Konicek,
Pen-Chung Yew,
Kyle Gallivan,
William Jalby,
Harry A. G. Wijshoff,
Randall Bramley,
U. M. Yang,
Perry A. Emrath,
David A. Padua,
Rudolf Eigenmann,
Jay Hoeflinger,
Greg Jaxon,
Zhiyuan Li,
T. Murphy,
John T. Andrews,
Stephen W. Turner:
The Cedar System and an Initial Performance Study.
ISCA 1993: 213-223 |
| 14 | EE | Rudolf Eigenmann,
Jay Hoeflinger,
Greg Jaxon,
Zhiyuan Li,
David A. Padua:
Restructuring Fortran programs for Cedar.
Concurrency - Practice and Experience 5(7): 553-573 (1993) |
| 1992 |
|---|
| 13 | EE | Zhiyuan Li:
Array privatization for parallel execution of loops.
ICS 1992: 313-322 |
| 1991 |
|---|
| 12 | | Rudolf Eigenmann,
Jay Hoeflinger,
Greg Jaxon,
Zhiyuan Li,
David A. Padua:
Restructuring Fortran Programs for Cedar.
ICPP (1) 1991: 57-66 |
| 11 | EE | Zhiyuan Li:
Compiler algorithms for event variable synchronization.
ICS 1991: 85-95 |
| 10 | | Rudolf Eigenmann,
Jay Hoeflinger,
Zhiyuan Li,
David A. Padua:
Experience in the Automatic Parallelization of Four Perfect-Benchmark Programs.
LCPC 1991: 65-83 |
| 1990 |
|---|
| 9 | EE | Zhiyuan Li,
Pen-Chung Yew,
Chuan-Qi Zhu:
An Efficient Data Dependence Analysis for Parallelizing Compilers.
IEEE Trans. Parallel Distrib. Syst. 1(1): 26-34 (1990) |
| 8 | EE | Zhiyu Shen,
Zhiyuan Li,
Pen-Chung Yew:
An Empirical Study of Fortran Programs for Parallelizing Compilers.
IEEE Trans. Parallel Distrib. Syst. 1(3): 356-364 (1990) |
| 1989 |
|---|
| 7 | | Zhiyu Shen,
Zhiyuan Li,
Pen-Chung Yew:
An Empirical Study on Array Subscripts and Data Dependencies.
ICPP (2) 1989: 145-152 |
| 6 | EE | Zhiyuan Li,
Pen-Chung Yew,
Chuan-Qi Zhu:
Data dependence analysis on multi-dimensional array references.
ICS 1989: 215-224 |
| 5 | | Zhiyuan Li,
Edward M. Reingold:
Solution of a Divide-and-Conquer Maximin Recurrence.
SIAM J. Comput. 18(6): 1188-1200 (1989) |
| 1988 |
|---|
| 4 | | Zhiyuan Li,
Pen-Chung Yew:
Interprocedural Analysis for Parallel Programs.
ICPP (2) 1988: 221-228 |
| 3 | | Zhiyuan Li,
Pen-Chung Yew:
Efficient Interprocedural Analysis for Program Parallelization and Restructuring.
PPOPP/PPEALS 1988: 85-99 |
| 1987 |
|---|
| 2 | | Zhiyuan Li,
Walid A. Abu-Sufah:
On Reducing Data Synchronization in Multiprocessed Loops.
IEEE Trans. Computers 36(1): 105-109 (1987) |
| 1985 |
|---|
| 1 | | Zhiyuan Li,
Walid A. Abu-Sufah:
A Technique for Reducing Synchronization Overhead in Large Scale Multiprocessors.
ISCA 1985: 284-291 |
