| 2006 |
|---|
| 9 | EE | Vivek Garg,
Vikram Chandrasekhar,
Milagros Sashikánth,
V. Kamakoti:
An Area and Configuration-Bit Optimized CLB Architecture and Timing-Driven Packing for FPGAs.
VLSI Design 2006: 507-510 |
| 2005 |
|---|
| 8 | EE | Vivek Garg,
Vikram Chandrasekhar,
Milagros Sashikánth,
V. Kamakoti:
A novel CLB architecture and circuit packing algorithm for logic-area reduction in SRAM-based FPGAs.
ASP-DAC 2005: 791-794 |
| 7 | EE | Vivek Garg,
Vikram Chandrasekhar,
Milagros Sashikánth,
V. Kamakoti:
A function generator-based reconfigurable system.
ASP-DAC 2005: 905-909 |
| 6 | EE | Roger Su,
Raman Mittal,
Vivek Garg:
Synchronous Pipelined Relay Stations with Back-Pressure Tolerance.
IWSOC 2005: 517-520 |
| 1998 |
|---|
| 5 | EE | Vivek Garg,
David E. Schimmel:
Hiding Communication Latency in Data Parallel Applications.
IPPS/SPDP 1998: 18-23 |
| 1997 |
|---|
| 4 | EE | Vivek Garg,
David E. Schimmel:
CCSIMD: A Concurrent Communication and Computation Framework for SIMD Machines.
PCRCW 1997: 55-64 |
| 3 | | Vivek Garg,
David E. Schimmel:
Performance modeling of dense Cholesky factorization on the MasPar MP-2.
Concurrency - Practice and Experience 9(7): 697-719 (1997) |
| 1995 |
|---|
| 2 | | Vivek Garg,
David E. Schimmel:
Architectural Support for Inter-Stream Communication in a MSIMD System.
HPCA 1995: 348-357 |
| 1993 |
|---|
| 1 | | James D. Allen,
Vivek Garg,
David E. Schimmel:
Analysis of Control Parallelism in SIMD Instruction Streams.
SPDP 1993: 383-390 |
