17. VLSI Design 2004:
Mumbai,
India
17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India.
IEEE Computer Society 2004, ISBN 0-7695-2072-3 BibTeX
@proceedings{DBLP:conf/vlsid/2004,
title = {17th International Conference on VLSI Design (VLSI Design 2004),
with the 3rd International Conference on Embedded Systems Design,
5-9 January 2004, Mumbai, India},
booktitle = {VLSI Design},
publisher = {IEEE Computer Society},
year = {2004},
isbn = {0-7695-2072-3},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Tutorials
- Samar Saha, Bhaskar Gadepally:
Technology CAD: Technology Modeling, Device Design and Simulation.
3-5
Electronic Edition (link) BibTeX
- Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah:
Physical Design Trends and Layout-Based Fault Modeling.
6-8
Electronic Edition (link) BibTeX
- Indradeep Ghosh, Rajarshi Mukherjee, Mukul R. Prasad, Masahiro Fujita:
High Level Design Validation: Current Practices and Future Directions.
9-11
Electronic Edition (link) BibTeX
- Krithi Ramamritham, Kavi Arya, Gerhard Fohler:
System Software for Embedded Applications.
12-14
Electronic Edition (link) BibTeX
- Siva Narendra, Vasantha Erraguntla, James Tschanz, Nitin Borkar:
Design Challenges in Sub-100nm High Performance Microprocessors.
15-17
Electronic Edition (link) BibTeX
- Peter A. Beerel, Jordi Cortadella, Alex Kondratyev:
Bridging the Gap between Asynchronous Design and Designers.
18-20
Electronic Edition (link) BibTeX
- Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer, Thomas Rinderknecht:
Embedded Test for Low Cost Manufacturing.
21-23
Electronic Edition (link) BibTeX
- Gérard Berry:
Synchronous Methodology for Designing Hardware, Software and Mixed Embedded Systems.
24-
Electronic Edition (link) BibTeX
Plenary Talks
Voltage Analog Design
Embedded Keynote
Papers
Low Power Logic Synthesis
Embedded Keynote
Papers
Formal Verification
Papers
Embedded System Design
Mixed Signal Design
Papers
Design Methodology
Papers
- Ronald W. Mehler, Dian Zhou:
Automated Architectural Optimization of Digital FIR Filters.
177-182
Electronic Edition (link) BibTeX
- Rui Min, Zhiyong Xu, Yiming Hu, Wen-Ben Jone:
Partial Tag Comparison: A New Technology for Power-Efficient Set-Associative Cache Designs.
183-188
Electronic Edition (link) BibTeX
- Vijay D'Silva, S. Ramesh, Arcot Sowmya:
Bridge Over Troubled Wrappers: Automated Interface Synthesis.
189-194
Electronic Edition (link) BibTeX
- Ashok K. Murugavel, N. Ranganathan:
Gate Sizing and Buffer Insertion using Economic Models for Power Optimization.
195-200
Electronic Edition (link) BibTeX
- Seok-Soo Yoon, Seok-Ryong Yoon, Seon Wook Kim, Chulwoo Kim:
Charge-Sharing-Problem Reduced Split-Path Domino Logic.
201-
Electronic Edition (link) BibTeX
Leakage Reduction
Papers
- Rohini Krishnan, José Pineda de Gyvez:
Low Energy Switch Block For FPGAs.
209-214
Electronic Edition (link) BibTeX
- Sergey Romanovsky, Arun Achyuthan, Sreedhar Natarajan, Wing Leung:
Leakage Reduction techniques in a 0.13um SRAM Cell.
215-221
Electronic Edition (link) BibTeX
- Ge Yang, Zhongda Wang, Sung-Mo Kang:
Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies.
222-227
Electronic Edition (link) BibTeX
- Narender Hanchate, Nagarajan Ranganathan:
A New Technique for Leakage Reduction in CMOS Circuits using Self-Controlled Stacked Transistors.
228-233
Electronic Edition (link) BibTeX
- Rahul M. Rao, Jeffrey L. Burns, Richard B. Brown:
Analysis and Optimization of Enhanced MTCMOS Scheme.
234-239
Electronic Edition (link) BibTeX
- Kaviraj Chopra, Sarma B. K. Vrudhula, Sarvesh Bhardwaj:
Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic.
240-
Electronic Edition (link) BibTeX
Embedded OS and Software
Embedded Keynote
Papers
VLSI Technology
Papers
Reconfigurable Design
Embedded Keynote
Design Tools
Embedded Keynote
Papers
Emerging Areas in VLSI
Embedded Keynote
Banquet Speech
Plenary Talks
RF Design
- Sanjive Agarwala, Paul Wiley, Arjun Rajagopal, Anthony M. Hill, Raguram Damodaran, Lewis Nardini, Tim Anderson, Steven Mullinnix, Jose Flores, Heping Yue, Abhijeet Chachad, John Apostol, Kyle Castille, Usha Narasimha, Tod Wolf, N. S. Nagaraj, Manjeri Krishnan, Luong Nguyen, Todd Kroeger, Mike Gill, Peter Groves, Bill Webster, Joel Graber, Christine Karlovich:
A 800 MHz System-on-Chip for Wireless Infrastructure Applications.
381-
Electronic Edition (link) BibTeX
Papers
- Jie Long, Robert J. Weber:
A Low Voltage, Low Noise CMOS RF Receiver Front-End.
393-397
Electronic Edition (link) BibTeX
- V. Veeresh Babu, Sumantra Seth, A. N. Chandorkar:
Design of RF Tuner for Cable Modem Applications.
398-403
Electronic Edition (link) BibTeX
- Amlan Ghosh, Bevin G. Perumana, Ashudeb Dutta, Padmanava Sen, Yogesh Kumar, Vipul Garg, T. K. Bhattacharyya, Nirmal B. Chakrabarti:
Design and Implementation of 935 MHz FM Transceiver for Radio Telemetry and 2.45 GHz Direct AQPSK Transmitter in CMOS.
404-409
Electronic Edition (link) BibTeX
- Padmanava Sen, Vipul Garg, Ramesh Garg, Nirmal B. Chakrabarti:
Design of Power Amplifiers at 2.4 GHz/900 MHz and Implementation of On-chip Linearization Technique in 0.18/0.25 ?I`m CMOS.
410-415
Electronic Edition (link) BibTeX
- T. Hui Teo, Ee-Sze Khoo, Dasgupta Uday, Chin-Boon Tear:
Design, Analysis, and Implementation of Analog Complex Filter for Low-IF Wireless LAN Application.
416-
Electronic Edition (link) BibTeX
Interconnect
Embedded Keynote
Papers
Fault Detection
Embedded Keynote
Papers
System on Chip
Embedded Keynote
Papers
Analog Design
Design Methodology
Papers
- Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma:
Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework.
559-564
Electronic Edition (link) BibTeX
- G. Hazari, Madhav P. Desai, A. Gupta, S. Chakraborty:
A Novel Technique Towards Eliminating the Global Clock in VLSI Circuits.
565-570
Electronic Edition (link) BibTeX
- Aditya Mittal, Madhav P. Desai:
A Distributed and Pipelined Controller for a Modular and Scalable Hardware Emulator.
571-
Electronic Edition (link) BibTeX
- Jens Bieger, Sorin A. Huss, Michael Jung, Stephan Klaus, Thomas Steininger:
Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach.
577-
Electronic Edition (link) BibTeX
Test Pattern Generation
Papers
Embedded Systems
Embedded Keynote
Poster Session A
- R. Dehghani, Seyed Mojtaba Atarodi, B. Bornoosh, Ali Afzali-Kusha:
A Reduced Complexity 3rd Order Digital Delta-Sigma Modulator for Fractional-N Frequency Synthesis.
615-618
Electronic Edition (link) BibTeX
- S. Nagar, Baquer Mazhari:
A New Approach To Topology Selection For Cell-Level Analog Circuits.
619-622
Electronic Edition (link) BibTeX
- Gagandeep S. Sandha, Pawan K. Singh, C. Pradeep Kumar, D. Nagchoudhuri:
Quantitative Model for Thermal Behaviour of an Analog Integrated Circuit.
623-626
Electronic Edition (link) BibTeX
- Ghanshyam Nayak, P. R. Mukund:
Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package.
627-630
Electronic Edition (link) BibTeX
- M. Benmansour, P. R. Mukund:
A Tuned Wideband LNA in 0.25?I`m IBM Process For RF Communication Applications.
631-634
Electronic Edition (link) BibTeX
- Tejasvi Das, P. R. Mukund:
A Low Noise Current-mode Readout circuit for CMOS Image Sensing Applications.
635-638
Electronic Edition (link) BibTeX
- F. Farbiz, M. Farazian, M. Emadi, K. Sadeghi:
Sizing Consideration for Leakage Control Transistor.
639-641
Electronic Edition (link) BibTeX
- Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap:
A Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework.
642-645
Electronic Edition (link) BibTeX
- Shrutin Ulman:
Analytical Expressions For Static Characteristics of Submicron CMOS Inverters.
646-649
Electronic Edition (link) BibTeX
- Venkat Rao, Gaurav Singhal, Anshul Kumar:
Real Time Dynamic Voltage Scaling For Embedded Systems.
650-653
Electronic Edition (link) BibTeX
- M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishnan:
Designing Leakage Aware Multipliers.
654-657
Electronic Edition (link) BibTeX
- Dainius Ciuplys, Per Larsson-Edefors:
On Maximum Current Estimation in CMOS Digital Circuits.
658-661
Electronic Edition (link) BibTeX
- Anurag Chaudhry, M. Jagadesh Kumar:
Exploring the Novel Characteristics of Fully Depleted Dual-Material Gate (DMG) SOI MOSFET using Two-Dimensional Numerical Simulation Studies.
662-665
Electronic Edition (link) BibTeX
- Ashis Kumar Mal, Anindya Sundar Dhar:
Analog VLSI Architecture for Discrete Cosine Transform using Dynamic Switched Capacitors.
666-669
Electronic Edition (link) BibTeX
- Ashok K. Murugavel, N. Ranganathan:
Game Theoretic Modeling of Voltage and Frequency Scaling during Behavioral Synthesis.
670-
Electronic Edition (link) BibTeX
Poster Session B
- N. Sudha:
An ASIC Implementation of Kohonen's Map Based Color Image Compression.
677-680
Electronic Edition (link) BibTeX
- Chih-Jen Yen, Wen-Yaw Chung, Mely Chen Chi:
A Compact Low-Power Buffer Amplifier with Dynamic Bias Control Technique.
681-684
Electronic Edition (link) BibTeX
- Madhu Mutyam:
Preventing Crosstalk Delay using Fibonacci Representation.
685-688
Electronic Edition (link) BibTeX
- N. Sudha:
An Area-Efficient Pipelined Array Architecture for Euclidean Distance Transformation and Its FPGA Implementation.
689-692
Electronic Edition (link) BibTeX
- Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, Axel Jantsch:
The Nostrum Backbone - a Communication Protocol Stack for Networks on Chip.
693-696
Electronic Edition (link) BibTeX
- Manvendra Singh, B. S. Chauhan, N. K. Sharma:
VLSI Architecture of Centroid Tracking Algorithms for Video Tracker.
697-700
Electronic Edition (link) BibTeX
- Pradip Mandal:
A Narrow Pulse- Suppressing Filter For Input Buffer.
701-704
Electronic Edition (link) BibTeX
- Sachin Shrivastava, Dhanoop Varghese, Vikas Narang, N. V. Arvind:
Improved Approach for Noise Propagation to Identify Functional Noise Violations.
705-708
Electronic Edition (link) BibTeX
- Sreeram Chandrasekar, Sachin Shrivastava, Ajoy Mandal, Sornavalli Ramanathan:
An Efficient Approach to Crosstalk Noise Analysis at Multiple Operating Modes.
709-712
Electronic Edition (link) BibTeX
- Stelian Alupoaei, Srinivas Katkoori:
Energy Model Based Macrocell Placement for Wirelength Minimization.
713-716
Electronic Edition (link) BibTeX
- Jeremy Chan, Sri Parameswaran:
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture.
717-720
Electronic Edition (link) BibTeX
- Rajeev Murgai:
Net Buffering in the Presence of Multiple Timing Views.
721-726
Electronic Edition (link) BibTeX
- N. V. Arvind, K. A. Rajagopal, H. S. Ajith, Das Suparna:
Path Based Approach for Crosstalk Delay Analysis.
727-730
Electronic Edition (link) BibTeX
- Varun Jindal, Alpana Agarwal:
Carry Circuitry for LUT-Based FPGA.
731-734
Electronic Edition (link) BibTeX
- Minoru Watanabe, Fuminori Kobayashi:
An Optically Differential Reconfigurable Gate Array with a partial reconfiguration optical system and its power consumption estimation.
735-
Electronic Edition (link) BibTeX
Poster Session C
- Irith Pomeranz, Sudhakar M. Reddy:
On Interconnecting Circuits with Multiple Scan Chains for Improved Test Data Compression.
741-744
Electronic Edition (link) BibTeX
- Saraju P. Mohanty, Nagarajan Ranganathan, Sunil K. Chappidi:
ILP Models for Energy and Transient Power Minimization During Behavioral Synthesis.
745-748
Electronic Edition (link) BibTeX
- Syed Saif Abrar:
Cycle-Accurate Energy Model and Source-Independent Characterization Methodology for Embedded Processors.
749-752
Electronic Edition (link) BibTeX
- Rajeshwar S. Sable, Ravindra P. Saraf, Rubin A. Parekhji, Arun N. Chandorkar:
Built-in Self-test Technique for Selective Detection of Neighbourhood Pattern Sensitive Faults in Memories.
753-756
Electronic Edition (link) BibTeX
- Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Syed Mostahed Ali Chowdhury, Ahsan Raja Chowdhury:
Synthesis of Full-Adder Circuit Using Reversible Logic.
757-760
Electronic Edition (link) BibTeX
- Sourabh Saluja, Anshul Kumar:
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture.
761-764
Electronic Edition (link) BibTeX
- Nilesh Modi, Jordi Cortadella:
Boolean Decomposition Using Two-literal Divisors.
765-768
Electronic Edition (link) BibTeX
- Nirav Patel, M. Srihari, Pooja Maheswari, G. N. Nandakumar:
An Efficient Method to Generate Test Vectors for Combinational Cell Verification.
769-772
Electronic Edition (link) BibTeX
- Ravi Saini, Pramod Tanwar, A. S. Mandal, S. C. Bose, Raj Singh, Chandra Shekhar:
Design of an Application Specific Instruction Set Processor for Parametric Speech Synthesis.
773-775
Electronic Edition (link) BibTeX
- Gurashish Singh Brar, Susmit Biswas, Sudipta Kundu, Arijit Mukhopadhyay, Pratik Worah, Anupam Basu:
OaSis: An Application Specific Operating System for an Embedded Environment.
776-779
Electronic Edition (link) BibTeX
- Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishnan:
Synthesis of Application Specific Multiprocessor Architectures for Process Networks.
780-783
Electronic Edition (link) BibTeX
- Rajat Arora, Michael S. Hsiao:
Enhancing SAT-based Bounded Model Checking using Sequential Logic Implications.
784-787
Electronic Edition (link) BibTeX
- Subrangshu Das, Subash G. Chandar, Ashutosh Tiwari:
Reset Careabouts in a SoC Design.
788-
Electronic Edition (link) BibTeX
Plenary Talk
Device Physics
Embedded Keynote
Papers
Routing and Interconnect
Embedded Keynote
Papers
Testing
Embedded Keynote
Papers
- Dong Hyun Baik, Kewal K. Saluja, Seiji Kajihara:
Random Access Scan: A solution to test power, test data volume and test time.
883-888
Electronic Edition (link) BibTeX
- Sagar S. Sabade, D. M. H. Walker:
Comparison of Effectiveness of Current Ratio and Delta-IDDQ Tests.
889-894
Electronic Edition (link) BibTeX
- Xiaogang Du, Sudhakar M. Reddy, Wu-Tung Cheng, Joseph Rayhawk, Nilanjan Mukherjee:
At-Speed Built-in Self-Repair Analyzer for Embedded Word-Oriented Memories.
895-900
Electronic Edition (link) BibTeX
- M. S. Gaur, Mark Zwolinski:
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique.
901-906
Electronic Edition (link) BibTeX
- Gethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla:
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking.
907-
Electronic Edition (link) BibTeX
Processor Architecture
Embedded Keynote
Papers
UWB RF
Embedded Keynote
Design Contest
1st Prize
2nd Prize
Layout and Placement
Noise Analysis
Papers
Analog and RF Test
Embedded Keynote
Papers
- Sasikumar Cherubal, Ramakrishna Voorakaranam, Abhijit Chatterjee, John Mclaughlin, Jason L. Smith, David M. Majernik:
Concurrent RF Test Using Optimized Modulated RF Stimuli.
1017-1022
Electronic Edition (link) BibTeX
- Antonija Soldo, Anand Gopalan, P. R. Mukund, Martin Margala:
A Current Sensor for On-Chip, Non-Intrusive Testing of RF Systems.
1023-1026
Electronic Edition (link) BibTeX
- Sunil Rafeeque, Vinita Vasudevan:
A Built-in-Self-Test Scheme for Digital to Analog Converters.
1027-
Electronic Edition (link) BibTeX
Low Power Design
Papers
H/W Impl. of Algorithms
Motion Estimation
Papers
- Kavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar:
A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation.
1071-1076
Electronic Edition (link) BibTeX
- J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne Wolf:
An Architecture for Motion Estimation in the Transform Domain.
1077-1082
Electronic Edition (link) BibTeX
- Aleksandar Beric, Ramanathan Sethuraman, Harm Peters, Jef L. van Meerbergen, Gerard de Haan, Carlos A. Alba Pinto:
A 27 mW 1.1 mm2 Motion Estimator for Picture-Rate Up-converter.
1083-
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:46:43 2009
by Michael Ley (ley@uni-trier.de)
