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Marong Phadoongsidhi

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2005
5EEMarong Phadoongsidhi, Kewal K. Saluja: SCINDY: Logic Crosstalk Delay Fault Simulation in Sequential Circuits. VLSI Design 2005: 820-823
2004
4EEMarong Phadoongsidhi, Kewal K. Saluja: Static Timing Analysis of Irreversible Crosstalk Noise Pulse Faults. VLSI Design 2004: 437-442
2003
3EEMarong Phadoongsidhi, Kewal K. Saluja: Event-Centric Simulation of Crosstalk Pulse Faults in Sequential Circuits. ICCD 2003: 42-47
2002
2EEMarong Phadoongsidhi, Kim T. Le, Kewal K. Saluja: A Concurrent Fault Simulation for Crosstalk Faults in Sequential Circuits. Asian Test Symposium 2002: 182-
2001
1EEHiroshi Takahashi, Marong Phadoongsidhi, Yoshinobu Higami, Kewal K. Saluja, Yuzo Takamatsu: Simulation-Based Diagnosis for Crosstalk Faults in Sequential Circuits. Asian Test Symposium 2001: 63-

Coauthor Index

1Yoshinobu Higami [1]
2Kim T. Le [2]
3Kewal K. Saluja [1] [2] [3] [4] [5]
4Hiroshi Takahashi [1]
5Yuzo Takamatsu [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)