| 2007 |
|---|
| 35 | EE | Shubha Bommalingaiahnapallya,
Kin-Joe Sham,
Mahmoud Reza Ahmadi,
Ramesh Harjani:
High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator.
ISCAS 2007: 3896-3899 |
| 2005 |
|---|
| 34 | EE | Byunghoo Jung,
Yi-Hung Tseng,
Jackson Harvey,
Ramesh Harjani:
Pulse generator design for UWB IR communication systems.
ISCAS (5) 2005: 4381-4384 |
| 33 | EE | Byunghoo Jung,
Shubha Bommalingaiahnapallya,
Ramesh Harjani:
Power optimized LC VCO and mixer co-design.
ISCAS (5) 2005: 4393-4396 |
| 32 | EE | Shubha Bommalingaiahnapallya,
Ramesh Harjani:
Process tolerant design of N-tone Sigma-Delta converters.
ISCAS (5) 2005: 4630-4633 |
| 31 | EE | Sachin S. Sapatnekar,
Jaijeet S. Roychowdhury,
Ramesh Harjani:
High-Speed Interconnect Technology: On-Chip and Off-Chip.
VLSI Design 2005: 7- |
| 2004 |
|---|
| 30 | EE | Shubha Bommalingaiahnapallya,
Ramesh Harjani:
Low power implementation of an n-tone Sigma Delta converter.
ISCAS (1) 2004: 461-464 |
| 29 | | Byunghoo Jung,
Ramesh Harjani:
A wide tuning range VCO using capacitive source degeneration.
ISCAS (4) 2004: 145-148 |
| 28 | EE | Ramesh Harjani,
Jackson Harvey,
Robert Sainati:
Analog/RF Physical Layer Issues For UWB Systems.
VLSI Design 2004: 941- |
| 2003 |
|---|
| 27 | EE | Byunghoo Jung,
Anand Gopinath,
Ramesh Harjani:
A novel noise optimization design technique for radio frequency low noise amplifiers.
ISCAS (1) 2003: 209-212 |
| 26 | EE | Deepa S. Parthasarathy,
Ramesh Harjani:
Novel integratable notch filter implementation for 100 dB image rejection.
ISCAS (1) 2003: 473-476 |
| 2001 |
|---|
| 25 | EE | R. Balczewski,
Ramesh Harjani:
Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltages.
ISCAS (1) 2001: 508-511 |
| 24 | EE | Wooyoung Choi,
Ramesh Harjani,
Bapiraju Vinnakota:
Non-ideal amplifier effects on the accuracy of analog-to-digital capacitor ratio converter.
ISCAS (1) 2001: 552-555 |
| 23 | EE | Jonghae Kim,
Ramesh Harjani:
An ISM band CMOS integrated transceiver design for wireless telemetry system.
ISCAS (4) 2001: 694-697 |
| 22 | EE | Jackson Harvey,
Ramesh Harjani:
Analysis and gain design of an integrated quadrature mixer with improved noise and image rejection.
ISCAS (4) 2001: 786-789 |
| 21 | | Ramesh Harjani,
Jackson Harvey:
Tutorial: CMOS Analog Circuits for Wireless Communications.
VLSI Design 2001: 18 |
| 20 | EE | Jackson Harvey,
Ramesh Harjani:
An Integrated Quadrature Mixer with Improved Image Rejection at Low Voltage.
VLSI Design 2001: 269-273 |
| 2000 |
|---|
| 19 | EE | Wooyoung Choi,
Ramesh Harjani,
Bapiraju Vinnakota:
Optimal test-set generation for parametric fault detection in switched capacitor filters.
Asian Test Symposium 2000: 72-77 |
| 18 | EE | Liang Dai,
Ramesh Harjani:
Analysis and design of low-phase-noise ring oscillators.
ISLPED 2000: 289-294 |
| 17 | | Ramesh Harjani:
Analog Circuits for Wireless Communications.
VLSI Design 2000: 7 |
| 16 | EE | Bapiraju Vinnakota,
Ramesh Harjani:
DFT for digital detection of analog parametric faults in SC filters.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(7): 789-798 (2000) |
| 1999 |
|---|
| 15 | EE | Ramesh Harjani,
Bapiraju Vinnakota:
Digital Aetection of Analog Parametric Faults in SC Filters.
DAC 1999: 772-777 |
| 14 | EE | Kavita Nair,
Ramesh Harjani:
A telemetry and interface circuit for piezoelectric sensors.
ISCAS (5) 1999: 152-155 |
| 13 | EE | Kavita Nair,
Ramesh Harjani:
Compact, Ultra Low Power, Programmable Continuous-Time Filter Banks for Feedback Cancellation in Hearing Aid.
VLSI Design 1999: 55-60 |
| 1997 |
|---|
| 12 | EE | Bapiraju Vinnakota,
Ramesh Harjani,
Wooyoung Choi:
Pseudoduplication - An ACOB Technique for Single-Ended Circuits.
VLSI Design 1997: 398-402 |
| 11 | EE | K. Roy,
R. Roy,
Ramesh Harjani,
K. S. Murthy:
T5: Low-Power Design.
VLSI Design 1997: 4- |
| 1996 |
|---|
| 10 | EE | Bapiraju Vinnakota,
Ramesh Harjani:
Mixed-Signal Design for Test.
VLSI Design 1996: 2 |
| 1995 |
|---|
| 9 | EE | Bapiraju Vinnakota,
Ramesh Harjani,
Nicholas J. Stessman:
System-Level Design for Test of Fully Differential Analog Circuits.
DAC 1995: 450-454 |
| 8 | | Feng Wang,
Ramesh Harjani:
Dynamic Amplifiers: Settling, Slewing and Power Issues.
ISCAS 1995: 319-322 |
| 1994 |
|---|
| 7 | EE | Jianfeng Shao,
Ramesh Harjani:
Macromodeling of analog circuits for hierarchical circuit design.
ICCAD 1994: 656-663 |
| 6 | | Andrew Cable,
Ramesh Harjani:
A 6-Bit 50MHz Current-Subtracting Two Step Flash Converter.
ISCAS 1994: 465-468 |
| 5 | | Bapiraju Vinnakota,
Ramesh Harjani:
The Design of Analog Self-Checking Circuits.
VLSI Design 1994: 67-70 |
| 1993 |
|---|
| 4 | | Brian A. Blow,
Ramesh Harjani,
Dennis L. Polla,
Takashi Tamagawa:
A Dual Frequency Range Integrated Circuit Accelerometer Using Capacitive and Piezoelectric Sensing Techniques.
ISCAS 1993: 1120-1123 |
| 3 | | Rongtai Wang,
Ramesh Harjani:
Suppression of acoustic oscillations in hearing aids using minimum phase techniques.
ISCAS 1993: 818-821 |
| 1989 |
|---|
| 2 | EE | Ramesh Harjani,
Rob A. Rutenbar,
L. Richard Carley:
OASYS: a framework for analog circuit synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1247-1266 (1989) |
| 1987 |
|---|
| 1 | EE | Ramesh Harjani,
Rob A. Rutenbar,
L. Richard Carley:
A Prototype Framework for Knowledge-Based Analog Circuit Synthesis.
DAC 1987: 42-49 |
