| 2008 |
|---|
| 6 | EE | Hao San,
Hajime Konagaya,
Feng Xu,
Atsushi Motozawa,
Haruo Kobayashi,
Kazumasa Ando,
Hiroshi Yoshida,
Chieto Murayama,
Kanichi Miyazawa:
Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator.
IEICE Transactions 91-A(4): 965-970 (2008) |
| 2007 |
|---|
| 5 | EE | Hao San,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Akira Hayakawa,
Haruo Kobayashi,
Masao Hotta:
A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS.
ASP-DAC 2007: 96-97 |
| 4 | EE | Hao San,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Akira Hayakawa,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Transactions 90-C(6): 1181-1188 (2007) |
| 2006 |
|---|
| 3 | EE | Hao San,
Akira Hayakawa,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Kazuyuki Kobayashi,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Transactions 89-A(4): 908-915 (2006) |
| 2005 |
|---|
| 2 | EE | Jun Otsuki,
Hao San,
Haruo Kobayashi,
Takanori Komuro,
Yoshihisa Yamada,
Aiyan Liu:
Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths.
IEICE Transactions 88-C(6): 1290-1294 (2005) |
| 2004 |
|---|
| 1 | EE | Hao San,
Haruo Kobayashi,
Shinya Kawakami,
Nobuyuki Kuroiwa:
An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators.
VLSI Design 2004: 151-156 |
