2008 |
15 | EE | Md. Rafiqul Islam,
Wanlei Zhou,
Morshed U. Chowdhury:
Email Categorization Using (2+1)-Tier Classification Algorithms.
ACIS-ICIS 2008: 276-281 |
14 | EE | Md. Rafiqul Islam,
Md. Zahidul Islam,
Nazia Leyla:
A tree-based approach to matchmaking algorithms for resource discovery.
Int. Journal of Network Management 18(5): 427-436 (2008) |
2007 |
13 | EE | Md. Rafiqul Islam,
Wanlei Zhou,
Morshed U. Chowdhury:
Dynamic Feature Selection for Spam Filtering Using Support Vector Machine.
ACIS-ICIS 2007: 757-762 |
12 | EE | Md. Rafiqul Islam,
Wanlei Zhou:
Architecture of Adaptive Spam Filtering Based on Machine Learning Algorithms.
ICA3PP 2007: 458-469 |
11 | EE | Md. Rafiqul Islam,
Wanlei Zhou:
Email Categorization Using Multi-stage Classification Technique.
PDCAT 2007: 51-58 |
2006 |
10 | EE | Sajid Hussain,
Md. Rafiqul Islam,
Elhadi Shakshuki,
M. S. Zaman:
Agent-Based Petroleum Offshore Monitoring Using Sensor Networks.
DEXA Workshops 2006: 103-107 |
2005 |
9 | | Md. Rafiqul Islam,
Morshed U. Chowdhury,
Wanlei Zhou:
An Innovative Spam Filtering Model Based on Support Vector Machine.
CIMCA/IAWTIC 2005: 348-353 |
2004 |
8 | EE | Hafiz Md. Hasan Babu,
Moinul Islam Zaber,
Md. Mazder Rahman,
Md. Rafiqul Islam:
Implementation of Multiple-Valued Flip-Flips Using Pass Transistor Logic.
DSD 2004: 603-606 |
7 | | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Rumana Nazmul,
Md. Anwarul Haque,
Ahsan Raja Chowdhury:
A heuristic approach to synthesize Boolean functions using TANT network.
ISCAS (2) 2004: 373-376 |
6 | EE | Hafiz Md. Hasan Babu,
Moinul Islam Zaber,
Md. Rafiqul Islam,
Md. Mazder Rahman:
On the Minimization of Multiple-Valued Input Binary-Valued Output Functions.
ISMVL 2004: 321-326 |
5 | EE | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Syed Mostahed Ali Chowdhury,
Ahsan Raja Chowdhury:
Synthesis of Full-Adder Circuit Using Reversible Logic.
VLSI Design 2004: 757-760 |
2003 |
4 | EE | Md. Rafiqul Islam,
Hafiz Md. Hasan Babu,
Mohammad Abdur Rahim Mustafa,
Md. Sumon Shahriar:
A Heuristic Approach for Design of Easily Testable PLAs Using Pass Transistor Logic.
Asian Test Symposium 2003: 90-95 |
3 | EE | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Ahsan Raja Chowdhury,
Syed Mostahed Ali Chowdhury:
Reversible Logic Synthesis for Minimization of Full-Adder Circuit.
DSD 2003: 50-54 |
2 | EE | Hafiz Md. Hasan Babu,
Md. Rafiqul Islam,
Amin Ahsan Ali,
Mohammad Musa Salehin Akon:
A Technique for Logic Design of Voltage-Mode Pass Transistor Based Multi-Valued Multiple-Output Logic Circuits.
ISMVL 2003: 111-116 |
2002 |
1 | | Md. Rafiqul Islam,
Morshed U. Chowdhury:
Eliminating of the Drawback of Existing Testing Technique of Easily Testable PLAs Using an Improved Testing Algorithm with Product Line Rearrangement.
CAINE 2002: 239-242 |