P. R. Suresh

2004
4	EE	P. R. Suresh, P. K. Sundararajan, Anshuli Goel, H. Udayakumar, C. Srinivasan, Vasudev Sinari, Raghavendrakumar Ravinutala: Package-silicon co-design - Experiment with an SOC design. VLSI Design 2004: 531-
2002
3	EE	Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R. Suresh: Transistor Flaring in Deep Submicron-Design Considerations. VLSI Design 2002: 299-304
2001
2	EE	N. V. Arvind, P. R. Suresh, V. Sivakumar, Chandrani Pal, Debaprasad Das: Integrated Crosstalk And Oxide Integrity Analysis In Dsm Designs. VLSI Design 2001: 518-523
1995
1	EE	Varna Puvvada, S. Potla, S. Tamizh Selvam, P. R. Suresh: A simulation study on the effectiveness of n-guardring/p-guardring on latchup in 0.8 /spl mu/m CMOS technology. VLSI Design 1995: 192-

Coauthor Index

1	N. V. Arvind	[2]
2	Debaprasad Das	[2]
3	Anshuli Goel	[4]
4	C. B. Keshav	[3]
5	Chandrani Pal	[2]
6	S. Potla	[1]
7	Varna Puvvada	[1]
8	Raghavendrakumar Ravinutala	[4]
9	S. Tamizh Selvam	[1]
10	Vasudev Sinari	[4]
11	Vipul Singhal	[3]
12	V. Sivakumar	[2]
13	C. Srinivasan	[4]
14	P. K. Sundararajan	[4]
15	K. G. Surnanth	[3]
16	H. Udayakumar	[4]

Colors in the list of coauthors