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Jerzy Tyszer

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2009
63EENilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Defect Aware to Power Conscious Tests - The New DFT Landscape. VLSI Design 2009: 23-25
62EENilanjan Mukherjee, Artur Pogiel, Janusz Rajski, Jerzy Tyszer: High-Speed On-Chip Event Counters for Embedded Systems. VLSI Design 2009: 275-280
2008
61EEJanusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Neelanjan Mukherjee, Mark Kassab: X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 147-159 (2008)
60EEDariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Low-Power Test Data Application in EDT Environment Through Decompressor Freeze. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1278-1290 (2008)
2007
59EEGrzegorz Mrugalski, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer: New Test Data Decompressor for Low Power Applications. DAC 2007: 539-544
58EEDariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Low Power Embedded Deterministic Test. VTS 2007: 75-83
57EEJerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai: X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis. IEEE Design & Test of Computers 24(5): 476-485 (2007)
56EEGrzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jerzy Tyszer: Fault Diagnosis With Convolutional Compactors. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1478-1494 (2007)
55EEGrzegorz Mrugalski, Janusz Rajski, Chen Wang, Artur Pogiel, Jerzy Tyszer: Isolation of Failing Scan Cells through Convolutional Test Response Compaction. J. Electronic Testing 23(1): 35-45 (2007)
2006
54EEGrzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Test response compactor with programmable selector. DAC 2006: 1089-1094
53EEArtur Pogiel, Janusz Rajski, Jerzy Tyszer: Convolutional Compactors with Variable Polynomials. European Test Symposium 2006: 117-122
52EEGrzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: High Performance Dense Ring Generators. IEEE Trans. Computers 55(1): 83-87 (2006)
2005
51EEHuaxing Tang, Chen Wang, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Irith Pomeranz: On Efficient X-Handling Using a Selective Compaction Scheme to Achieve High Test Response Compaction Ratios. VLSI Design 2005: 59-64
50EEJanusz Rajski, Jerzy Tyszer: Synthesis of X-Tolerant Convolutional Compactors. VTS 2005: 114-119
49EEJanusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M. Reddy: Finite memory test response compactors for embedded test applications. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 622-634 (2005)
2004
48EEGrzegorz Mrugalski, Chen Wang, Artur Pogiel, Jerzy Tyszer, Janusz Rajski: Fault Diagnosis in Designs with Convolutional Compactors. ITC 2004: 498-507
47EEJanusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer, Thomas Rinderknecht: Embedded Test for Low Cost Manufacturing. VLSI Design 2004: 21-23
46EEGrzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Planar High Performance Ring Generators. VTS 2004: 193-198
45EEJanusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee: Embedded deterministic test. IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 776-792 (2004)
44EEGrzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Ring generators - new devices for embedded test applications. IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1306-1320 (2004)
2003
43EEChen Wang, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Jerzy Tyszer: On Compacting Test Response Data Containing Unknown Values. ICCAD 2003: 855-862
42EEJanusz Rajski, Jerzy Tyszer: Test Data Compression and Compaction for Embedded Test of Nanometer Technology Designs. ICCD 2003: 331-
41EEJanusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M. Reddy: Convolutional Compaction of Test Responses. ITC 2003: 745-754
40EEGrzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: High Speed Ring Generators and Compactors of Test Data. VTS 2003: 57-62
39EEGrzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski: 2D Test Sequence Generators. IEEE Design & Test of Computers 20(1): 51-59 (2003)
38EEJanusz Rajski, Mark Kassab, Nilanjan Mukherjee, Nagesh Tamarapalli, Jerzy Tyszer, Jun Qian: Embedded Deterministic Test for Low-Cost Manufacturing. IEEE Design & Test of Computers 20(5): 58-66 (2003)
37EEJanusz Rajski, Jerzy Tyszer: Primitive Polynomials Over GF(2) of Degree up to 660 with Uniformly Distributed Coefficients. J. Electronic Testing 19(6): 645-657 (2003)
2002
36EEJanusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee, Rob Thompson, Kun-Han Tsai, Andre Hertwig, Nagesh Tamarapalli, Grzegorz Mrugalski, Geir Eide, Jun Qian: Embedded Deterministic Test for Low-Cost Manufacturing Test. ITC 2002: 301-310
2001
35EENilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Testing Schemes for FIR Filter Structures. IEEE Trans. Computers 50(7): 674-688 (2001)
2000
34EEGrzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski: Linear Independence as Evaluation Criterion for Two-Dimensional Test Pattern Generators. VTS 2000: 377-388
33EEJanusz Rajski, Nagesh Tamarapalli, Jerzy Tyszer: Automated synthesis of phase shifters for built-in self-testapplications. IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1175-1188 (2000)
32EEGrzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Cellular automata-based test pattern generators with phase shifters. IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 878-893 (2000)
1999
31 Grzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski: Synthesis of pattern generators based on cellular automata with phase shifters. ITC 1999: 368-377
30 Janusz Rajski, Jerzy Tyszer, Sanjay Patel: Built-In Self-Test for Systems on Silicon. VLSI Design 1999: 609-610
29EEJanusz Rajski, Grzegorz Mrugalski, Jerzy Tyszer: Comparative Study of CA-based PRPGs and LFSRs with Phase Shifters. VTS 1999: 236-245
28 Janusz Rajski, Jerzy Tyszer: Diagnosis of Scan Cells in BIST Environment. IEEE Trans. Computers 48(7): 724-731 (1999)
1998
27EEJanusz Rajski, Nagesh Tamarapalli, Jerzy Tyszer: Automated synthesis of large phase shifters for built-in self-test. ITC 1998: 1047-1056
26EEJanusz Rajski, Jerzy Tyszer: Modular logic built-in self-test for IP cores. ITC 1998: 313-
25EEJanusz Rajski, Jerzy Tyszer: Design of Phase Shifters for BIST Applications. VTS 1998: 218-224
24 Janusz Rajski, Jerzy Tyszer, Nadime Zacharia: Test Data Decompression for Multiple Scan Designs with Boundary Scan. IEEE Trans. Computers 47(11): 1188-1200 (1998)
1997
23 Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Parameterizable Testing Scheme for FIR Filters. ITC 1997: 694-703
22 Janusz Rajski, Jerzy Tyszer: Fault Diagnosis in Scan-Based BIST. ITC 1997: 894-902
21 Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Design of Testable Multipliers for Fixed-Width Data Paths. IEEE Trans. Computers 46(7): 795-810 (1997)
20EEKatarzyna Radecka, Janusz Rajski, Jerzy Tyszer: Arithmetic built-in self-test for DSP cores. IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1358-1369 (1997)
1996
19 Nadime Zacharia, Janusz Rajski, Jerzy Tyszer, John A. Waicukauski: Two-Dimensional Test Data Decompressor for Multiple Scan Designs. ITC 1996: 186-194
18 Andrzej Jajszczyk, Jerzy Tyszer: Broadband Time-Division Circuit Switching. IEEE Journal on Selected Areas in Communications 14(2): 337-345 (1996)
17 Janusz Rajski, Jerzy Tyszer: On Linear Dependencies in Subspaces of LFSR-Generated Sequences. IEEE Trans. Computers 45(10): 1212-1216 (1996)
16 Sanjay Gupta, Janusz Rajski, Jerzy Tyszer: Arithmetic Additive Generators of Pseudo-Exhaustive Test Patterns. IEEE Trans. Computers 45(8): 939-949 (1996)
1995
15EEMark Kassab, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Software Accelerated Functional Fault Simulation for Data-Path Architectures. DAC 1995: 333-338
14EENilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: On testable multipliers for fixed-width data path architectures. ICCAD 1995: 541-547
13 Mark Kassab, Janusz Rajski, Jerzy Tyszer: Hierarchical Functional-Fault Simulation for High-Level Synthesis. ITC 1995: 596-605
12EENilanjan Mukherjee, H. Kassab, Janusz Rajski, Jerzy Tyszer: Arithmetic built-in self test for high-level synthesis. VTS 1995: 132-139
11EENadime Zacharia, Janusz Rajski, Jerzy Tyszer: Decompression of test data using variable-length seed LFSRs. VTS 1995: 426-433
1994
10EESanjay Gupta, Janusz Rajski, Jerzy Tyszer: Test pattern generation based on arithmetic operations. ICCAD 1994: 117-124
1993
9 Janusz Rajski, Jerzy Tyszer: Recursive Pseudoexhaustive Test Pattern Generation. IEEE Trans. Computers 42(12): 1517-1521 (1993)
8 Janusz Rajski, Jerzy Tyszer: Accumulator-Based Compaction of Test Responses. IEEE Trans. Computers 42(6): 643-650 (1993)
7EEJanusz Rajski, Jerzy Tyszer: Test responses compaction in accumulators with rotate carry adders. IEEE Trans. on CAD of Integrated Circuits and Systems 12(4): 531-539 (1993)
1991
6EEJanusz Rajski, Jerzy Tyszer: On the diagnostic properties of linear feedback shift registers. IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1316-1322 (1991)
1990
5 Janusz Rajski, Jerzy Tyszer, Babak Salimi: On the Diagnostic Resolution of Signature Analysis. ICCAD 1990: 364-367
1988
4 Jerzy Tyszer: A Multiple Fault-Tolerant Processor Network Architecture for Pipeline Computing. IEEE Trans. Computers 37(11): 1414-1418 (1988)
1986
3 Janusz Rajski, Jerzy Tyszer: The Influence of Masking Phenomenon on Coverage Capability of Single Fault Test Sets in PLA's. IEEE Trans. Computers 35(1): 81-85 (1986)
1985
2 Janusz Rajski, Jerzy Tyszer: Combinatorial Approach to Multiple Contact Faults Coverage in Programmable Logic Arrays. IEEE Trans. Computers 34(6): 549-553 (1985)
1984
1 Janusz Rajski, Jerzy Tyszer: The detection of small size multiple faults by single fault test sets n programmable logic arrays. Fehlertolerierende Rechensysteme 1984: 417-425

Coauthor Index

1Wu-Tung Cheng [57] [61]
2Dariusz Czysz [58] [59] [60]
3Geir Eide [36]
4Sanjay Gupta [10] [16]
5Andre Hertwig [36]
6Andrzej Jajszczyk [18]
7H. Kassab [12]
8Mark Kassab [13] [15] [36] [38] [45] [57] [61]
9Liyang Lai [57]
10Grzegorz Mrugalski [29] [31] [32] [34] [36] [39] [40] [44] [46] [48] [52] [54] [55] [56] [57] [58] [59] [60] [61]
11Neelanjan Mukherjee [61]
12Nilanjan Mukherjee [12] [14] [15] [21] [23] [35] [36] [38] [45] [46] [47] [52] [57] [62] [63]
13Sanjay Patel [30]
14Artur Pogiel [48] [53] [55] [56] [62]
15Irith Pomeranz [43] [51]
16Jun Qian [36] [38]
17Katarzyna Radecka [20]
18Janusz Rajski [1] [2] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55] [56] [57] [58] [59] [60] [61] [62] [63]
19Sudhakar M. Reddy [41] [43] [49] [51]
20Thomas Rinderknecht [47]
21Babak Salimi [5]
22Manish Sharma [57]
23Nagesh Tamarapalli [27] [33] [36] [38]
24Huaxing Tang [51]
25Rob Thompson [36]
26Kun-Han Tsai [36]
27John A. Waicukauski [19]
28Chen Wang [41] [43] [48] [49] [51] [55]
29Nadime Zacharia [11] [19] [24]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)