| 2006 |
|---|
| 6 | EE | Harsh Dhand,
Basant Kumar Dwivedi,
M. Balakrishnan:
New approach to architectural synthesis: incorporating QoS constraint.
EMSOFT 2006: 301-310 |
| 5 | EE | Basant Kumar Dwivedi,
Arun Kejariwal,
M. Balakrishnan,
Anshul Kumar:
Rapid Resource-Constrained Hardware Performance Estimation.
IEEE International Workshop on Rapid System Prototyping 2006: 40-46 |
| 2004 |
|---|
| 4 | EE | Basant Kumar Dwivedi,
Anshul Kumar,
M. Balakrishnan:
Automatic synthesis of system on chip multiprocessor architectures for process networks.
CODES+ISSS 2004: 60-65 |
| 3 | EE | Basant Kumar Dwivedi,
Anshul Kumar,
M. Balakrishnan:
Synthesis of Application Specific Multiprocessor Architectures for Process Networks.
VLSI Design 2004: 780-783 |
| 2003 |
|---|
| 2 | EE | Amarjeet Singh,
Amit Chhabra,
Anup Gangwar,
Basant Kumar Dwivedi,
M. Balakrishnan,
Anshul Kumar:
SoC Synthesis with Automatic Hardware Software Interface Generation.
VLSI Design 2003: 585- |
| 2001 |
|---|
| 1 | EE | Basant Kumar Dwivedi,
Jan Hoogerbrugge,
Paul Stravers,
M. Balakrishnan:
Exploring design space of parallel realizations: MPEG-2 decoder case study.
CODES 2001: 92-97 |
