![]() |
| 2004 | ||
|---|---|---|
| 3 | EE | M. S. Gaur, Mark Zwolinski: Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique. VLSI Design 2004: 901-906 |
| 2003 | ||
| 2 | EE | Mark Zwolinski, M. S. Gaur: Integrating testability with design space exploration. Microelectronics Reliability 43(5): 685-693 (2003) |
| 1997 | ||
| 1 | EE | Y. Narahari, N. Hemachandra, M. S. Gaur: Transient analysis of multiclass manufacturing systems with priority scheduling. Computers & OR 24(5): 387-398 (1997) |
| 1 | N. Hemachandra | [1] |
| 2 | Y. Narahari (Yadati Narahari) | [1] |
| 3 | Mark Zwolinski | [2] [3] |