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M. S. Gaur

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2004
3EEM. S. Gaur, Mark Zwolinski: Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique. VLSI Design 2004: 901-906
2003
2EEMark Zwolinski, M. S. Gaur: Integrating testability with design space exploration. Microelectronics Reliability 43(5): 685-693 (2003)
1997
1EEY. Narahari, N. Hemachandra, M. S. Gaur: Transient analysis of multiclass manufacturing systems with priority scheduling. Computers & OR 24(5): 387-398 (1997)

Coauthor Index

1N. Hemachandra [1]
2Y. Narahari (Yadati Narahari) [1]
3Mark Zwolinski [2] [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)