| 2005 |
|---|
| 5 | EE | G. N. Nandakumar,
Nirav Patel,
Raghunatha Reddy,
Makeshwar Kothandaraman:
Application of Douglas-Peucker Algorithm to Generate Compact but Accurate IBIS Models.
VLSI Design 2005: 757-761 |
| 2004 |
|---|
| 4 | EE | Nirav Patel,
M. Srihari,
Pooja Maheswari,
G. N. Nandakumar:
An Efficient Method to Generate Test Vectors for Combinational Cell Verification.
VLSI Design 2004: 769-772 |
| 1998 |
|---|
| 3 | | Abhijit Das,
Samrat Sen,
Mohan Rangan,
Rupesh Nayak,
G. N. Nandakumar:
False Path Detection at Transistor Level.
VLSI Design 1998: 226-229 |
| 1993 |
|---|
| 2 | | Ravindranath Naiknaware,
G. N. Nandakumar,
Srinivasa Rao Kasa:
Automatic Test Plan Generation for Analog and Mixed Signal Integrated Circuits using Partial Activation and High Level Simulation.
ITC 1993: 139-148 |
| 1 | | Ravindranath Naiknaware,
G. N. Nandakumar,
Rajeev Arora,
John Larkin:
Automatic Test Plan Generation for Analog Integrated Circuits - A Practical Approach.
VLSI Design 1993: 140-143 |
