2009 |
52 | EE | Vikas Kaushal,
Quentin Diduck,
Martin Margala:
Study of leakage current mechanisms in ballistic deflection transistors.
ACM Great Lakes Symposium on VLSI 2009: 165-168 |
51 | EE | Samed Maltabas,
Martin Margala,
Ugur Çilingiroglu:
Varicap threshold logic.
ACM Great Lakes Symposium on VLSI 2009: 239-244 |
50 | EE | Sohan Purohit,
Sai Rahul Chalamalasetti,
Martin Margala:
A 1.2v, 1.02 ghz 8 bit SIMD compatible highly parallel arithmetic data path for multi-precision arithmetic.
ACM Great Lakes Symposium on VLSI 2009: 433-436 |
49 | EE | Sohan Purohit,
Martin Margala,
Marco Lanuzza,
Pasquale Corsonello:
New performance/power/area efficient, reliable full adder design.
ACM Great Lakes Symposium on VLSI 2009: 493-498 |
48 | EE | Sohan Purohit,
Marco Lanuzza,
Stefania Perri,
Pasquale Corsonello,
Martin Margala:
Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath.
VLSI Design 2009: 45-50 |
2008 |
47 | EE | Kevin Sliech,
Martin Margala:
A Digital BIST for Phase-Locked Loops.
DFT 2008: 134-142 |
46 | EE | Michael Wieckowski,
Martin Margala:
A portless SRAM Cell using stunted wordline drivers.
ISCAS 2008: 584-587 |
45 | EE | Marco Lanuzza,
Stefania Perri,
Pasquale Corsonello,
Martin Margala:
Energy Efficient Coarse-Grain Reconfigurable Array for Accelerating Digital Signal Processing.
PATMOS 2008: 297-306 |
44 | EE | Sohan Purohit,
Sai Rahul Chalamalasetti,
Martin Margala,
Pasquale Corsonello:
Power/throughput/area efficient PIM-based reconfigurable array for parallel processing.
SoCC 2008: 375-378 |
2007 |
43 | EE | Marco Lanuzza,
Stefania Perri,
Pasquale Corsonello,
Martin Margala:
A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications.
AHS 2007: 119-126 |
42 | EE | John Liobe,
Martin Margala:
Novel Process and Temperature-Stable BICS for Embedded Analog and Mixed-Signal Test.
IOLTS 2007: 231-236 |
41 | EE | Sandeep Patil,
Michael Wieckowski,
Martin Margala:
A Self-Biased Charge-Transfer Sense Amplifier.
ISCAS 2007: 3030-3033 |
40 | EE | Richard Geisler,
John Liobe,
Martin Margala:
Process and Temperature Calibration of PLLs with BiST Capabilities.
ISCAS 2007: 3864-3867 |
39 | EE | Brandon J. Jasionowski,
Michelle K. Lay,
Martin Margala:
A Processor-In-Memory Architecture for Multimedia Compression.
IEEE Trans. VLSI Syst. 15(4): 478-483 (2007) |
2006 |
38 | EE | Martin Margala:
Adaptable Architectures for Signal Processing Applications.
AHS 2006: 247-254 |
37 | EE | Yuxin Wang,
Martin Margala:
New Embedded Core Testing for System-on-Chips and System-in-Packages.
CCECE 2006: 1897-1900 |
36 | EE | Yuxin Wang,
D. Makadia,
Martin Margala:
On-Chip Integrated Antennas - The First Challenge for Reliable on-Chip Wireless Interconnects.
CCECE 2006: 2322-2325 |
35 | EE | Yunan Xiang,
R. Pettibon,
Martin Margala:
A versatile computation module for adaptable multimedia processors.
ISCAS 2006 |
34 | EE | Pasquale Corsonello,
Stefania Perri,
Martin Margala:
An integrated countermeasure against differential power analysis for secure smart-cards.
ISCAS 2006 |
33 | EE | Quentin Diduck,
John Liobe,
Sadeka Ali,
Martin Margala:
Process tolerant calibration circuit for PLL applications with BIST.
ISCAS 2006 |
32 | EE | Dan Zhao,
Shambhu J. Upadhyaya,
Martin Margala:
Design of a wireless test control network with radio-on-chip technology for nanometer system-on-a-chip.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1411-1418 (2006) |
2005 |
31 | EE | Michael Wieckowski,
John Liobe,
Quentin Diduck,
Martin Margala:
A New Test Methodology For DNL Error In Flash ADC's.
DFT 2005: 582-590 |
30 | EE | Sadeka Ali,
Gregory Briggs,
Martin Margala:
A High Frequency, Low Jitter Auto-Calibration Phase-Locked Loop with Built-in-Self-Test.
DFT 2005: 591-600 |
29 | | Marco Lanuzza,
Stefania Perri,
Martin Margala,
Pasquale Corsonello:
Low-Cost Fully Reconfigurable Data-Path for FPGA-Based Multimedia Processor.
FPL 2005: 13-18 |
28 | EE | Marco Lanuzza,
Martin Margala,
Pasquale Corsonello:
Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications.
ISLPED 2005: 161-166 |
27 | EE | Brian Moore,
Martin Margala,
Christopher J. Backhouse:
Design of wireless on-wafer submicron characterization system.
IEEE Trans. VLSI Syst. 13(2): 169-180 (2005) |
26 | EE | Viera Stopjaková,
P. Malosek,
M. Matej,
Vladislav Nagy,
Martin Margala:
Defect detection in analog and mixed circuits by neural networks using wavelet analysis.
IEEE Transactions on Reliability 54(3): 441-448 (2005) |
25 | EE | Anand Gopalan,
Martin Margala,
P. R. Mukund:
A current based self-test methodology for RF front-end circuits.
Microelectronics Journal 36(12): 1091-1102 (2005) |
2004 |
24 | | Quentin Diduck,
Martin Margala:
6-bit low power low area frequency modulation based flash ADC.
ISCAS (1) 2004: 137-140 |
23 | | Natalia Kazakova,
Martin Margala,
Nelson G. Durdle:
Sobel edge detection processor for a real-time volume rendering system.
ISCAS (2) 2004: 913-916 |
22 | | Sadeka Ali,
Martin Margala:
A 5.1-GHz CMOS PLL based integer-N frequency synthesizer with ripple-free control voltage and improved acquisition time.
ISCAS (4) 2004: 237-240 |
21 | EE | Karthik Sundararaman,
Shambhu J. Upadhyaya,
Martin Margala:
Cost Model Analysis of DFT Based Fault Tolerant SOC Designs.
ISQED 2004: 465-469 |
20 | EE | Antonija Soldo,
Anand Gopalan,
P. R. Mukund,
Martin Margala:
A Current Sensor for On-Chip, Non-Intrusive Testing of RF Systems.
VLSI Design 2004: 1023-1026 |
19 | EE | Brian Moore,
Christopher J. Backhouse,
Martin Margala:
Design of Wireless Sub-Micron Characterization System.
VTS 2004: 341-346 |
18 | EE | Martin Margala,
Hongfan Wang:
New approach to design for reusability of arithmetic cores in systems-on-chip.
Integration 38(2): 185-203 (2004) |
17 | EE | Viera Stopjaková,
P. Malosek,
D. Micusík,
M. Matej,
Martin Margala:
Classification of Defective Analog Integrated Circuits Using Artificial Neural Networks.
J. Electronic Testing 20(1): 25-37 (2004) |
2003 |
16 | EE | Marco S. Dragic,
Martin Margala:
Power Supply Current Test Approach for Resistive Fault Screening in Embedded Analog Circuits.
DFT 2003: 124-131 |
15 | EE | Dan Zhao,
Shambhu J. Upadhyaya,
Martin Margala:
Control Constrained Resource Partitioning for Complex SoCs.
DFT 2003: 425-432 |
14 | | Martin Margala,
Quentin Diduck,
Eric Moule:
1.8V 0.18µm CMOS Novel Successive Approximation ADC.
VLSI-SOC 2003: 375-379 |
13 | | Martin Margala,
John Liobe,
Quentin Diduck:
Deep-Submicron CMOS Design Methodology for High-Performance Low-Power Analog-to-Digital Converters.
VLSI-SOC 2003: 380-385 |
12 | | Martin Margala,
Magdy A. El-Moursy,
Ali El-Moursy,
Junmou Zhang,
Wendi Beth Heinzelman:
1-V ADPCM Processor for Low-Power Wireless Applications.
VLSI-SOC 2003: 386-393 |
2002 |
11 | EE | Rong Lin,
Martin Margala:
Novel design and verification of a 16 x 16-b self-repairable reconfigurable inner product processor.
ACM Great Lakes Symposium on VLSI 2002: 172-177 |
10 | EE | Dan Zhao,
Shambhu J. Upadhyaya,
Martin Margala:
Minimizing concurrent test time in SoC's by balancing resource usage.
ACM Great Lakes Symposium on VLSI 2002: 77-82 |
9 | EE | Viera Stopjaková,
D. Micusík,
Lubica Benusková,
Martin Margala:
Neural Networks-Based Parametric Testing of Analog IC.
DFT 2002: 408-418 |
8 | EE | Srdjan Dragic,
Igor M. Filanovsky,
Martin Margala:
Low-voltage analog current detector supporting at-speed BIST.
ISCAS (1) 2002: 593-596 |
7 | EE | Srdjan Dragic,
Martin Margala:
A 1.2V Built-In Architecture for High Frequency On-Line Iddq/delta Iddq Test.
ISVLSI 2002: 165-170 |
2001 |
6 | EE | Natalia Kazakova,
R. Sung,
Nelson G. Durdle,
Martin Margala,
Julien Lamoureux:
Fast and low-power inner product processor.
ISCAS (4) 2001: 646-649 |
5 | | Brian W. Curran,
Mary Gifaldi,
Jason Martin,
Alper Buyuktosunoglu,
Martin Margala,
David H. Albonesi:
Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors.
VLSI-SOC 2001: 289-300 |
2000 |
4 | EE | Martin Margala,
Srdjan Dragic,
Ahmed El-Abasiry,
Samuel Ekpe,
Viera Stopjaková:
I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test.
IOLTW 2000: 92-93 |
1999 |
3 | EE | Martin Margala:
Low-Power SRAM Circuit Design.
MTDT 1999: 115-122 |
2 | EE | Martin Margala:
Low Power SRAMs for Battery Operation.
MTDT 1999: 6- |
1995 |
1 | EE | Martin Margala,
Nelson G. Durdle,
Scott Juskiw,
V. James Raso,
Doug L. Hill:
A 33 MHz 16-bit gradient calculator for real-time volume imaging.
Computers & Graphics 19(5): 679-684 (1995) |