| 2008 |
|---|
| 10 | EE | B. V. N. Silpa,
Anjul Patney,
Tushar Krishna,
Preeti Ranjan Panda,
G. S. Visweswaran:
Texture filter memory: a power-efficient and scalable texture memory architecture for mobile graphics processors.
ICCAD 2008: 559-564 |
| 2006 |
|---|
| 9 | EE | V. Rao,
N. Navet,
G. Singhal,
A. Kumar,
G. S. Visweswaran:
Battery aware dynamic scheduling for periodic task graphs.
IPDPS 2006 |
| 2005 |
|---|
| 8 | EE | Mukul Milind Ojha,
Arun Kumar Anand,
G. S. Visweswaran,
D. Nagchoudhuri:
A Relative Comparative Based Datapath for Increasing Resolution in a Capacitive Fingerprint Sensor Chip.
VLSI Design 2005: 828-831 |
| 2004 |
|---|
| 7 | EE | Tushar S. Shelar,
G. S. Visweswaran:
Inclusion of Thermal Effects in the Simulation of Bipolar Circuits using Circuit Level Behavioral Modeling.
VLSI Design 2004: 821-826 |
| 2000 |
|---|
| 6 | EE | Sanjeev Kumar Maheshwari,
R. S. Krishanan,
G. S. Visweswaran:
Jitter Estimation Methodology for Clock Chips.
VLSI Design 2000: 480-482 |
| 5 | EE | Sanjeev Kumar Maheshwari,
G. S. Visweswaran:
A 3.3V Compatible 2.5V TTL-to-CMOS Bidirectional I/O Buffer.
VLSI Design 2000: 484-487 |
| 1999 |
|---|
| 4 | | Basabi Bhaumik,
Pravas Pradhan,
G. S. Visweswaran,
Rajamohan Varambally,
Anand Hardi:
A Low Power 256 KB SRAM Design.
VLSI Design 1999: 67-71 |
| 3 | | Basabi Bhaumik,
G. S. Visweswaran,
R. Lakshminarasimhan:
A New Test Compression Scheme.
VLSI Design 1999: 95-99 |
| 1998 |
|---|
| 2 | | Saeid Nooshabadi,
G. S. Visweswaran,
D. Nagchoudhuri:
Current Mode Ternary D/A Converter.
VLSI Design 1998: 244-248 |
| 1997 |
|---|
| 1 | EE | Saeid Nooshabadi,
Juan A. Montiel-Nelson,
G. S. Visweswaran,
D. Nagchoudhuri:
Micropipeline Architecture for Multiplier-less FIR Filters.
VLSI Design 1997: 451-456 |
