| 2005 |
|---|
| 12 | EE | Prabhat Mishra,
Nikil D. Dutt,
Narayanan Krishnamurthy,
Magdy S. Abadir:
A methodology for validation of microprocessors using symbolic simulation.
IJES 1(1/2): 14-22 (2005) |
| 2004 |
|---|
| 11 | EE | Narayanan Krishnamurthy,
Jayanta Bhadra,
Magdy S. Abadir,
Jacob A. Abraham:
Towards The Complete Elimination of Gate/Switch Level Simulations.
VLSI Design 2004: 115- |
| 10 | EE | Prabhat Mishra,
Nikil Dutt,
Narayanan Krishnamurthy,
Magdy S. Abadir:
A Top-Down Methodology for Microprocessor Validation.
IEEE Design & Test of Computers 21(2): 122-131 (2004) |
| 9 | EE | Jayanta Bhadra,
Narayanan Krishnamurthy,
Magdy S. Abadir:
Enhanced Equivalence Checking: Toward a Solidarity of Functional Verification and Manufacturing Test Generation.
IEEE Design & Test of Computers 21(6): 494-502 (2004) |
| 2003 |
|---|
| 8 | EE | Jayanta Bhadra,
Narayanan Krishnamurthy,
Magdy S. Abadir:
A Methodology for Validating Manufacturing Test Vector Suites for Custom Designed Scan-Based Circuits.
MTV 2003: 32-37 |
| 7 | EE | Magdy S. Abadir,
Ken Albin,
John Havlicek,
Narayanan Krishnamurthy,
Andrew K. Martin:
Formal Verification Successes at Motorola.
Formal Methods in System Design 22(2): 117-123 (2003) |
| 2002 |
|---|
| 6 | EE | Jayanta Bhadra,
Narayanan Krishnamurthy:
Automatic Generation of Design Constraints in Verifying High Performance Embedded Dynamic Circuits.
ITC 2002: 213-222 |
| 5 | EE | Narayanan Krishnamurthy,
Jayanta Bhadra,
Magdy S. Abadir,
Jacob A. Abraham:
Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs?
VTS 2002: 275-280 |
| 2001 |
|---|
| 4 | EE | Narayanan Krishnamurthy,
Magdy S. Abadir,
Andrew K. Martin,
Jacob A. Abraham:
Design and Development Paradigm for Industrial Formal Verification CAD Tools.
IEEE Design & Test of Computers 18(4): 26-35 (2001) |
| 2000 |
|---|
| 3 | EE | Narayanan Krishnamurthy,
Andrew K. Martin,
Magdy S. Abadir,
Jacob A. Abraham:
Validation of PowerPC(tm) Custom Memories using Symbolic Simulation.
VTS 2000: 9-14 |
| 2 | EE | Narayanan Krishnamurthy,
Andrew K. Martin,
Magdy S. Abadir,
Jacob A. Abraham:
Validating PowerPC Microprocessor Custom Memories.
IEEE Design & Test of Computers 17(4): 61-76 (2000) |
| 1999 |
|---|
| 1 | EE | Zeyad Alkhalifa,
V. S. S. Nair,
Narayanan Krishnamurthy,
Jacob A. Abraham:
Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection.
IEEE Trans. Parallel Distrib. Syst. 10(6): 627-641 (1999) |
