| 2004 |
|---|
| 8 | EE | Sasikumar Cherubal,
Ramakrishna Voorakaranam,
Abhijit Chatterjee,
John Mclaughlin,
Jason L. Smith,
David M. Majernik:
Concurrent RF Test Using Optimized Modulated RF Stimuli.
VLSI Design 2004: 1017-1022 |
| 2003 |
|---|
| 7 | EE | Ramakrishna Voorakaranam,
Randy Newby,
Sasikumar Cherubal,
Bob Cometta,
Thomas Kuehl,
David M. Majernik,
Abhijit Chatterjee:
Production Deployment of a Fast Transient Testing Methodology for Analog Circuits : Case Study and Results.
ITC 2003: 1174-1181 |
| 2002 |
|---|
| 6 | EE | Ramakrishna Voorakaranam,
Sasikumar Cherubal,
Abhijit Chatterjee:
A Signature Test Framework for Rapid Production Testing of RF Circuits.
DATE 2002: 186-191 |
| 2000 |
|---|
| 5 | EE | Ramakrishna Voorakaranam,
Abhijit Chatterjee:
Test Generation for Accurate Prediction of Analog Specifications.
VTS 2000: 137-142 |
| 1999 |
|---|
| 4 | EE | Ramakrishna Voorakaranam,
Abhijit Chatterjee:
Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test.
ARVLSI 1999: 342-357 |
| 3 | EE | Ramakrishna Voorakaranam,
Abhijit Chatterjee:
Hierarchical Test Generation for Analog Circuits Using Incremental Test Development.
VTS 1999: 296-303 |
| 1998 |
|---|
| 2 | EE | Alfred V. Gomes,
Ramakrishna Voorakaranam,
Abhijit Chatterjee:
Modular Fault Simulation of Mixed Signal Circuits with Fault Ranking by Severity.
DFT 1998: 341-348 |
| 1997 |
|---|
| 1 | | Ramakrishna Voorakaranam,
Sudip Chakrabarti,
Junwei Hou,
Alfred V. Gomes,
Sasikumar Cherubal,
Abhijit Chatterjee,
William H. Kao:
Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis.
ITC 1997: 903-912 |
