ICCAD 2006:
San Jose,
California,
USA
Soha Hassoun (Ed.):
2006 International Conference on Computer-Aided Design (ICCAD'06), November 5-9, 2006, San Jose, CA, USA.
ACM 2006, ISBN 1-59593-389-1 BibTeX
Parasitic simulation and modeling
Post-placement optimization techniques
Variation modeling
- Sarvesh H. Kulkarni, Dennis Sylvester, David Blaauw:
A statistical framework for post-silicon tuning through body bias clustering.
39-46
Electronic Edition (ACM DL) BibTeX
- Kenichi Shinkai, Masanori Hashimoto, Atsushi Kurokawa, Takao Onoye:
A gate delay model focusing on current fluctuation over wide-range of process and environmental variability.
47-53
Electronic Edition (ACM DL) BibTeX
- Xiaoji Ye, Peng Li, Frank Liu:
Practical variation-aware interconnect delay and slew analysis for statistical timing verification.
54-59
Electronic Edition (ACM DL) BibTeX
- Brian Cline, Kaviraj Chopra, David Blaauw, Yu Cao:
Analysis and modeling of CD variation for statistical static timing.
60-66
Electronic Edition (ACM DL) BibTeX
Embedded tutorial:
from dual to multi to many core - opportunities and challenges for supporting the new exponential
Embedded tutorial:
UML and SystemC for industrial ESL design - basic principles and applications
Efficient delay test generation
Power grid analysis and design
Optimization techniques for different target technologies
Placement and floorplanning
Digital and RF test and reliability
Statistical timing analysis
- Sari Onaissi, Farid N. Najm:
A linear-time approach for static timing analysis covering all process corners.
217-224
Electronic Edition (ACM DL) BibTeX
- Sarvesh Bhardwaj, Praveen Ghanta, Sarma B. K. Vrudhula:
A framework for statistical timing analysis using non-linear delay and slew models.
225-230
Electronic Edition (ACM DL) BibTeX
- Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan:
An accurate sparse matrix based framework for statistical static timing analysis.
231-236
Electronic Edition (ACM DL) BibTeX
- Kaviraj Chopra, Bo Zhai, David Blaauw, Dennis Sylvester:
A new statistical max operation for propagating skewness in statistical timing analysis.
237-243
Electronic Edition (ACM DL) BibTeX
Power and performance optimizations on system level design
Analog simulation and verification
Self adaptation and physical awareness in high-level synthesis
Advances in performance modeling for interconnect and memory
Embedded tutorial:
design and CAD challenges in 45nm CMOS and beyond - from front to back
Analog design automation techniques
Challenges on system level interconnection
- Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo:
Designing application-specific networks on chips with floorplan information.
355-362
Electronic Edition (ACM DL) BibTeX
- Gunar Schirner, Rainer Dömer:
Fast and accurate transaction level models using result oriented modeling.
363-368
Electronic Edition (ACM DL) BibTeX
- Yeow Meng Chee, Charles J. Colbourn, Alan C. H. Ling:
Optimal memoryless encoding for low power off-chip data buses.
369-374
Electronic Edition (ACM DL) BibTeX
Placement optimization:
timing,
noise,
and power
Timing and power analysis
- Debjit Sinha, DiaaEldin Khalil, Yehea I. Ismail, Hai Zhou:
A timing dependent power estimation framework considering coupling.
401-407
Electronic Edition (ACM DL) BibTeX
- Kenneth S. Stevens, Florentin Dartu:
Algorithms for MIS vector generation and pruning.
408-414
Electronic Edition (ACM DL) BibTeX
- Shuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng:
Timing model reduction for hierarchical timing analysis.
415-422
Electronic Edition (ACM DL) BibTeX
- Sean X. Shi, Peng Yu, David Z. Pan:
A unified non-rectangular device and circuit simulation model for timing and power.
423-428
Electronic Edition (ACM DL) BibTeX
Thermal and variability issues in architectures
Embedded tutorial:
automation in mixed-signal design - reality check and the nano challenge
Global routing
Emerging topics in signal integrity and reliability
- Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
An analytical model for negative bias temperature instability.
493-496
Electronic Edition (ACM DL) BibTeX
- Hossein Asadi, Mehdi Baradaran Tahoori:
Soft error derating computation in sequential circuits.
497-501
Electronic Edition (ACM DL) BibTeX
- Rajeev R. Rao, David Blaauw, Dennis Sylvester:
Soft error reduction in combinational logic using gate resizing and flipflop selection.
502-509
Electronic Edition (ACM DL) BibTeX
- Hung-Yi Liu, Chung-Wei Lin, Szu-Jui Chou, Wei-Ting Tu, Chih-Hung Liu, Yao-Wen Chang, Sy-Yen Kuo:
Current path analysis for electrostatic discharge protection.
510-515
Electronic Edition (ACM DL) BibTeX
Fault-tolerant energy minimization techniques for real-time embedded systems
Emerging issues in contemporaneous system level design
Clock and buffer synthesis
Thermal analysis for the nano scale
Advances in embedded system design
Architectural design techniques for high performance and robustness
Manufacturability and power in layout
Embedded tutorial:
emerging nanoelectronics - prospects,
state of the art and opportunities for CAD
Technology driven layout methodologies
Novel FPGA architectures,
techniques and designs
- Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Habib Mehrez:
Performances improvement of FPGA using novel multilevel hierarchical interconnection structure.
675-679
Electronic Edition (ACM DL) BibTeX
- Marvin Tom, David Leong, Guy G. Lemieux:
Un/DoPack: re-clustering of large system-on-chip designs with interconnect variation for low-cost FPGAs.
680-687
Electronic Edition (ACM DL) BibTeX
- Xin Jia, Ranga Vemuri:
Studying a GALS FPGA architecture using a parameterized automatic design flow.
688-693
Electronic Edition (ACM DL) BibTeX
- David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky:
Conjoining soft-core FPGA processors.
694-701
Electronic Edition (ACM DL) BibTeX
Specification and architecture challenges in high-level synthesis
- Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi, Li Jing:
High-level synthesis challenges and solutions for a dynamically reconfigurable processor.
702-708
Electronic Edition (ACM DL) BibTeX
- Jason Cong, Yiping Fan, Wei Jiang:
Platform-based resource binding using a distributed register-file microarchitecture.
709-715
Electronic Edition (ACM DL) BibTeX
- Greg Stitt, Frank Vahid, Walid A. Najjar:
A code refinement methodology for performance-improved synthesis from C.
716-723
Electronic Edition (ACM DL) BibTeX
- Girish Venkataramani, Seth Copen Goldstein:
Leveraging protocol knowledge in slack matching.
724-729
Electronic Edition (ACM DL) BibTeX
Defect tolerance for nanoscale architectures
Dynamic power management
Advances in model checking
Novel interconnect methodologies
- Hao Yu, Joanna Ho, Lei He:
Simultaneous power and thermal integrity driven via stapling in 3D ICs.
802-808
Electronic Edition (ACM DL) BibTeX
- Alberto Fazzi, L. Magagni, Mario de Dominicis, Paolo Zoffoli, Roberto Canegallo, Pier Luigi Rolandi, Alberto L. Sangiovanni-Vincentelli, Roberto Guerrieri:
Yield prediction for 3D capacitive interconnections.
809-814
Electronic Edition (ACM DL) BibTeX
- Renshen Wang, Rui Shi, Chung-Kuan Cheng:
Layer minimization of escape routing in area array packaging.
815-819
Electronic Edition (ACM DL) BibTeX
- Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulati, Alexander Sprintson:
Network coding for routability improvement in VLSI.
820-823
Electronic Edition (ACM DL) BibTeX
Embedded tutorial:
integrating nanoelectronics,
biotechnology and MEMS/NEMS
- Bernhard E. Boser:
From micro to nano: MEMS as an interface to the nano world.
824-825
Electronic Edition (ACM DL) BibTeX
- Ann Witvrouw:
CMOS-MEMS integration: why, how and what?
826-827
Electronic Edition (ACM DL) BibTeX
- Richard A. Kiehl:
Information processing in nanoscale arrays: DNA assembly, molecular devices, nano-array architectures.
828-829
Electronic Edition (ACM DL) BibTeX
- Vladimir Bulovi, Kevin Ryu, Charles Sodini, Ioannis Kymissis, Annie Wang, Ivan Nausieda, Akintunde Ibitayo Akinwande:
Molecular organic electronic circuits.
830-831
Electronic Edition (ACM DL) BibTeX
- Conor F. Madigan, Vladimir Bulovic:
Organic electronic device modeling at the nanoscale.
832-833
Electronic Edition (ACM DL) BibTeX
Embedded tutorial:
variability and yield improvement:
rules,
models,
and characterization
Accelerating verification
Model order reduction and parametric analysis
Design and modeling of molecular-scale systems
Copyright © Sat May 16 23:16:27 2009
by Michael Ley (ley@uni-trier.de)
