| 2007 |
|---|
| 10 | EE | Anand Ramalingam,
Ashish Kumar Singh,
Sani R. Nassif,
Michael Orshansky,
David Z. Pan:
Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis.
DAC 2007: 148-153 |
| 9 | EE | Ashish Kumar Singh,
Priya Chandran:
A Secure and Efficient Multi-authority Proactive Election Scheme.
ICISS 2007: 208-218 |
| 8 | EE | Ashish Kumar Singh,
Adnan Aziz,
Sriram Vishwanath,
Michael Orshansky:
Generation of Efficient Codes for Realizing Boolean Functions in Nanotechnologies
CoRR abs/cs/0703102: (2007) |
| 2006 |
|---|
| 7 | EE | Ashish Kumar Singh,
Murari Mani,
Ruchir Puri,
Michael Orshansky:
Gain-based technology mapping for minimum runtime leakage under input vector uncertainty.
DAC 2006: 522-527 |
| 6 | EE | Murari Mani,
Ashish Kumar Singh,
Michael Orshansky:
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization.
ICCAD 2006: 19-26 |
| 5 | EE | Anand Ramalingam,
Gi-Joon Nam,
Ashish Kumar Singh,
Michael Orshansky,
Sani R. Nassif,
David Z. Pan:
An accurate sparse matrix based framework for statistical static timing analysis.
ICCAD 2006: 231-236 |
| 2005 |
|---|
| 4 | | Tarvo Raudvere,
Ashish Kumar Singh,
Ingo Sander,
Axel Jantsch:
System level verification of digital signal processing applications based on the polynomial abstraction technique.
ICCAD 2005: 285-290 |
| 3 | | Ashish Kumar Singh,
Murari Mani,
Michael Orshansky:
Statistical technology mapping for parametric yield.
ICCAD 2005: 511-518 |
| 2004 |
|---|
| 2 | EE | Tarvo Raudvere,
Ashish Kumar Singh,
Ingo Sander,
Axel Jantsch:
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits.
DATE 2004: 690-691 |
| 2003 |
|---|
| 1 | EE | Tarvo Raudvere,
Ingo Sander,
Ashish Kumar Singh,
Axel Jantsch:
Verification of design decisions in ForSyDe.
CODES+ISSS 2003: 176-181 |
